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RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
146
Register 042H, 142H, 242H, 342H: BTIF Parity Configuration and Status
Bit
Type
Function
Default
Bit 7
R/W
TPTYP
0
Bit 6
R/W
TPTYE
0
Bit 5
R
BTPCMI
X
Bit 4
R
BTSIGI
X
Bit 3
R/W
PTY_EXTD
0
Bit 2
Unused
X
Bit 1
Unused
X
Bit 0
Unused
X
This register provides control and status reporting of data integrity checking on the BTPCM[x] and
BTSIG[x] signals of the transmit backplane interface in T1 and E1 mode. (When in Transmit Clock
Slave: H-MVIP mode, data integrity checking is performed on MVBTD and CASBTD on a per-
quadrant basis. Each of the four BTIF blocks checks parity over the data streams of its associated
quadrant.) A single parity bit in the first bit position of the frame (the F-bit if in T1 mode) represents
parity over the previous frame (including the undefined bit positions). Parity checking and
generation is not supported when the Nx64Kbit/s mode is active. Parity checking and generation
is not supported when mapping a 1.544 Mbit/s signal onto a higher rate backplane in the format
where the first 24 timeslots are used, i.e., the RATE[1:0] bits in the BTIF Configuration register are
not set to “00” and the MAP bit in the BTIF Frame Pulse Configuration register is logic 1.
TPTYP:
The transmit parity type (TPTYP) bit sets even or odd parity in the transmit streams. If TPTYP
is a logic 0, the expected parity value in the first bit position of the frame of BTPCM[x] or
MVBTD of the quadrant and BTSIG[x] or CASBTD of the quadrant is even, thus it is expected
to be a one if the number of ones in the previous frame is odd. If TPTYP is a logic 1, the
expected parity value in the first bit position of the frame of BTPCM[x] or MVBTD of the
quadrant and BTSIG[x] or CASBTD of the quadrant is odd, thus it is expected to be a one if
the number of ones in the previous frame is even.
TPTYE:
The transmit parity enable (TPTYE) bit enables transmit parity interrupts. When TPTYE is a
logic 1, parity errors on the inputs BTPCM[x] or MVBTD of the quadrant and BTSIG[x] or
CASBTD of the quadrant are indicated by the BTPCMI and BTSIGI bits, respectively, and by
the assertion low of the INTB output. When TPTYE is a logic 0, parity errors are indicated by
the BTPCMI and BTSIGI bits but are not indicated on the INTB output.