![](http://datasheet.mmic.net.cn/330000/PM4354-PI_datasheet_16444274/PM4354-PI_260.png)
RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
245
The SaX[1:4] bits are used to program the values transmitted in the Sa4, Sa5, Sa6, Sa7, and
Sa8 bits for a given Sub-multiframe.
When SaSEL[2:0] = 011, Sa4 is selected for programming.
When SaSEL[2:0] = 100, Sa5 is selected for programming.
When SaSEL[2:0] = 101, Sa6 is selected for programming.
When SaSEL[2:0] = 110, Sa7 is selected for programming.
When SaSEL[2:0] = 111, Sa8 is selected for programming.
(The SaSEL[2:0] bits are located in the E1-TRAN National Codeword Select register.)
SaX[1:4] is latched internally and can be updated by the user every Sub-multiframe. For
example, if SaX[1:4] is written to during SMF I, the values written will appear in SMF II of the
same multiframe. If SaX[1:4] is written during SMF II of a multiframe, the values will appear in
SMF I of the next multiframe. Since the values written are latched internally, whatever is
written will not affect what appears in the current Sub-multiframe.
Note: when Sa8[1:4] has been selected by setting the SaSEL[2:0] = 111, the SaX[1:4] bits are
mapped in this register in the reverse order as the SaX[1:4] bits, where X = 4, 5, 6 or 7. That
is, Sa8[1] is mapped to bit 0 of this register, Sa8[2] is mapped to bit 1, Sa8[3] is mapped to
bit 2, and Sa8[4] is mapped to bit 3.
Example:
Say that for Quadrant 1, the user wishes to program the Sa bits of Submultiframe I
as shown in Table 50 below.
Table 50
- Example Sa Bit Programming
Sub-multiframe
Frame
Bits 1 to 8 of the first timeslot of the frame
(SMF)
number
1
2
3
4
5
6
7
8
0
C1
0
0
1
Sa4=0
1
Sa5=1
0
Sa6=1
1
Sa7=1
1
Sa8=0
1
0
C2
1
A
2
0
0
1
Sa4=1
1
Sa5=1
0
Sa6=1
1
Sa7=0
1
Sa8=1
3
0
C3
1
A
4
0
0
1
Sa4=0
1
Sa5=1
0
Sa6=0
1
Sa7=1
1
Sa8=1
5
1
C4
1
A
6
0
0
1
Sa4=1
1
Sa5=1
0
Sa6=1
1
Sa7=1
1
Sa8=1
I
7
0
1
A
The desired values for SMF I are written during the SMF II prior to when the values are to be
transmitted. The writes are performed in advance so the values can be latched and available
for SMF I.
1. Write address 086H (i.e., SaSEL[2:0] bits) with a value of 60H to select Sa4.
2. Write address 087H (i.e., SaX_EN[1:4] and SaX[1:4] bits) with a value of F5H.
3. Write address 086H (i.e., SaSEL[2:0] bits) with a value of 80H to select Sa5.
4. Write address 087H (i.e., SaX_EN[1:4] and SaX[1:4] bits) with a value of FFH.