RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
19
Pin Name
Type
Pin No.Function
BTCLK[1]
BTCLK[2]
BTCLK[3]
BTCLK[4]
I/O
F3
H16
L2
M14
Backplane Transmit Clock (BTCLK[1:4]).
The active edge of the
Backplane Transmit Clock, BTCLK[x], is used to sample the associated
BTSIG[x] and BTPCM[x], and is used to update BTFP[x]. The active edge is
configured in the BTIF Configuration register.
When a Transmit Clock Master mode is active, BTCLK[x] is an output and is
a version of the transmit clock[x] which is generated from the receive
recovered clock or the common transmit clock, CTCLK.
When in T1 Transmit Clock Master: Nx64Kbit/s mode, BTCLK[x] is gapped
during the framing bit position and optionally for between 1 and 23 DS0
channels in the associated BTPCM[x] stream. When in E1 Transmit Clock
Master: Nx64Kbit/s mode, BTCLK[x] is gapped for between 1 and 31 channel
timeslots in the associated BTPCM[x] stream.
When in Transmit Clock Master: Clear Channel mode, the unframed
backplane transmit data is sampled on BTPCM[x] with no frame alignment or
signaling.
When in a Transmit Clock Slave mode, BTCLK[x] is configured as an input
and is used to time the backplane transmit interface. BTCLK[x] is either a
1.544MHz clock in T1 mode or a 2.048MHz clock in T1 or E1 modes.
BTCLK[x] is a nominal 1.544 or 2.048 MHz clock +/- 50ppm with a 50% duty
cycle.
When in Transmit Clock Slave: H-MVIP mode, BTCLK[x] is configured as an
input and is unused. In this mode, it is recommended that BTCLK[x] be
connected via an external resistor to ground.
After a reset, BTCLK[x] is configured as an input.
BTSIG[1]
BTSIG[2]
BTSIG[3]
BTSIG[4]
Input
G3
J14
M3
M15
Backplane Transmit Signaling (BTSIG[1:4]).
The BTSIG[x] input carries
the signaling bits for each channel in the transmit data frame, repeated for
the entire superframe. Each channel's signaling bits are in bit locations
5,6,7,8 of the channel and are channel-aligned with the BTPCM[x] data
stream. When in Transmit Clock Slave: H-MVIP mode, BTSIG[x] is unused.
BTSIG[x] is sampled on the active edge of BTCLK[x].