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RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
83
AUTOOOF:
The AUTOOOF bit allows quadrant trunk conditioning to be applied to the receive data
stream, BRPCM[x] or MVBRD of the quadrant, immediately upon declaration of out of frame
(OOF). When AUTOOOF is set to logic 1, while OOF is declared, the data on BRPCM[x] or
MVBRD for each channel of the quadrant is replaced with the data contained in the data trunk
conditioning registers within RPSC. When AUTOOOF is set to logic 0, the receive data
stream, BRPCM[x] or MVBRD of the quadrant, is not automatically conditioned by RPSC
when OOF is declared. However, if the RX-ELST is not bypassed, the RX-ELST trouble code
will still be inserted in channel data while OOF is declared if the TRKEN register bit is logic 1.
RPSC data and signaling trunk conditioning overwrites the RX-ELST trouble code.
AUTOAIS:
If the AUTOAIS bit is logic 1, AIS is inserted in the receive path and the channel associated
signaling is frozen for the duration of a loss of signal condition. (The loss of signal criteria is
configured via the LOS[1:0] bits of the CDRC Configuration register.) If AUTOAIS is logic 0,
AIS may be inserted manually via the RAIS register bit.
BPV:
In T1 mode, the BPV bit enables only bipolar violations to indicate line code violations and be
accumulated in the PMON LCV Count Registers. When BPV is set to logic 1, BPVs (which
are not part of a valid B8ZS signature if B8ZS line coding is used) generate an LCV indication
and increment the PMON LCV counter. When BPV is set to logic 0, both BPVs (which are not
part of a valid B8ZS signature if B8ZS line coding is used) and excessive zeros (EXZ)
generate an LCV indication and increment the PMON LCV counter. Excessive zeros is a
sequence of zeros greater than fifteen bits long for an AMI-coded signal and greater than
seven bits long for a B8ZS-coded signal.
In E1 mode, the BPV bit enables only bipolar violations to indicate line code violations and be
accumulated in the PMON LCV Count registers. (The O162 bit in the CDRC Configuration
register provides two E1 LCV definitions.) When BPV is set to logic 1, BPVs (which are not
part of a valid HDB3 signature if HDB3 line coding is used) generate an LCV indication and
increment the PMON LCV counter. When BPV is set to logic 0, both BPVs (which are not part
of a valid HDB3 signature if HDB3 line coding is used) and excessive zeros (EXZ) generate
an LCV indication and increment the PMON LCV counter. Excessive zeros is a sequence of
zeros greater than four bits long.