RELEASED
PM4354 COMET-QUAD
DATASHEET
PMC-1990315
ISSUE 6
FOUR CHANNEL COMBINED E1/T1/J1
TRANSCEIVER / FRAMER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE
50
9.16 Receive Per-Channel Serial Controller (RPSC)
The RPSC allows data and signaling trunk conditioning to be applied on the backplane receive
stream on a per-channel basis. It also allows per-channel control of data inversion, the extraction
of clock and data on BRCLK[x] and BRPCM[x] (when the Clock Master: Nx64Kbit/s mode is
active), and the detection or generation of pseudo-random patterns. The RPSC operates on the
data after its passage through ELST, so that data and signaling conditioning may overwrite the
ELST trouble code.
9.17 Pseudo Random Binary Sequence Generation and Detection (PRBS)
The Pseudo Random Binary Sequence Generator/Detector (PRBS) block is a software selectable
PRBS generator and checker for 2
11
-1, 2
15
-1 or 2
20
-1 PRBS polynomials for use in the T1 and E1
links. PRBS patterns may be generated in either the transmit or receive directions, and detected
in the opposite direction.
The PRBS block can perform an auto synchronization to the expected PRBS pattern and
accumulates the total number of bit errors in two 24-bit counters. The error count accumulates
over the interval defined by to the Quadrant PMON Update register. When an accumulation is
forced, the holding register is updated, and the counter reset to begin accumulating for the next
interval. The counter is reset in such a way that no events are missed. The data is then available
in the Error Count registers until the next accumulation.
9.18 Backplane Receive System Interface (BRIF)
The Backplane Receive System Interface (BRIF) block provides system side serial clock and data
access as well as H-MVIP access for up to 4 T1 or E1 receive streams. There are several
master and slave clock modes for serial clock and data system side access to the T1 and E1
streams. When enabled for 8.192 Mbit/s H-MVIP, there are three separate signals for data and
signaling. Information on programming the Backplane Receive System Interface can be found in
the Operation section.
Three Clock Master modes provide a serial clock and data backplane receive interface with
clocking provided by COMET-QUAD: Clock Master: Full T1/E1, Clock Master: Nx64Kbit/s, Clock
Master: Clear Channel. Three Clock slave modes provide a serial clock and data backplane
receive mode, an H-MVIP mode, and a mixed clock-and-data/H-MVIP mode. All Clock Slave
modes accept externally sourced clocking. The modes are Clock Slave: Full T1/E1, Clock Slave:
Full T1/E1 with CCS H-MVIP, and Clock Slave: H-MVIP.