参数资料
型号: SCD223110QCD
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 2 CHANNEL(S), 256K bps, SERIAL COMM CONTROLLER, PQFP100
封装: METRIC, QFP-100
文件页数: 72/178页
文件大小: 2247K
代理商: SCD223110QCD
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Datasheet
163
Figure 25. Bus Arbitration Cycle Timing
t12
BGIN*
A[0–7]
A/D[0–15]
ADLD*
t16
CLK
BUSCLK
BR*
t13
t15
AS*
A[8–15]
A[0–7]
A[16–31]
NOTE
t17
AEN*/DATEN*/
BGACK*
DATDIR*
t20
t24
R/W*
In DMA Read cycle, these pins will be tristate;
in DMA Write cycle, these pins will be D[0:15].
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