Test Support
ARM DDI 0144B
Copyright 1999, 2000 ARM Limited. All rights reserved.
10-3
The TIC uses a minimal three-wire handshake mechanism to control the application of
test vectors. In AMBA test mode, 32 bidirectional pins are required to transfer the test
data. These can be multiplexed for other uses in the normal operating mode of the chip.
The datapath of an
external bus interface
(EBI) or external memory interface is
commonly used to provide the 32-bit vector interface.
To support this method of test vector application, the ARM940T macrocell incorporates
dedicated test logic that allows the internal inputs to be driven and the internal outputs
to be monitored using transfers from the bus. The ARM940T is configured to act as an
AMBA slave during test mode because the test transfers are initiated by the TIC. A
simplified view of the test harness incorporated within the ARM940T is shown in
Figure 10-2 on page 10-3.
Figure 10-2 ARM940T integrated test harness
The ARM940T AMBA test logic also provides a high level of controllability over the
caches. This allows you to test the caches independently of the ARM9TDMI processor
core. The TAG address in the CAM array, the CAM valid and dirty bits, and the RAM
data can all be read and written in the AMBA Cache Test mode.
The ARM940T macrocell is supplied with a full test vector suite that achieves a high
node toggle coverage. It is, therefore, not necessary for the system designer to write test
patterns for the macrocell but to provide a suitable environment in which the supplied
test vectors can be applied.
You must use system-level functional vectors to test connections between ARM940T
and other logic on the chip.
Input ports
Inputs
Data In
Data Out
Outputs
Outputs
BA
ARM940T
internal logic
BA
BD
ARM940T