参数资料
型号: ORSO42G5-EV
厂商: Lattice Semiconductor Corporation
文件页数: 140/153页
文件大小: 0K
描述: BOARD EVAL DEV PLATFORM ORSO42G5
标准包装: 1
系列: ORCA® 4 系列
类型: FPGA
适用于相关产品: ORSO42G5
所含物品: 板,线缆,电源
其它名称: ORSO42G5EV
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
87
3082A - AC
3083A - AD
3092A - BC
3093A - BD
[0:4]
RSVD
00
Reserved
[5]
STAT_CELL_ALIGN_ERR_xx
STAT_CELL_ALIGN_ERR_xx = 1 same as
CELL_ALIGN_ERR_xx except that a 1 on this
bit can NOT cause an interrupt
Cell
[6]
STAT_TX_URUN_ERR_xx
STAT_TX_URUN_ERR_xx = 1 same as
TX_URUN_ERR_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
[7]
STAT_TX_ORUN_ERR_xx
STAT_TX_ORUN_ERR_xx = 1 same as
TX_ORUN_ERR_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
3082B -AC
3083B - AD
3092B - BC
3093B - BD
[0]
RSVD
00
Reserved
[1]
STAT_OOF_xx
STAT_OOF_xx = 1 same as OOF_xx except
that a 1 on this bit can NOT cause an interrupt
Both
[2]
STAT_EX_SEQ_ERR_xx
STAT_EX_SEQ_ERR_xx = 1 same as
EX_SEQ_ERR_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
[3]
STAT_SEQ_ERR_xx
STAT_SEQ_ERR_xx = 1 same as
SEQ_ERR_xx except that a 1 on this bit can
NOT cause an interrupt
Cell
[4]
STAT_CELL_BIP_ERR_xx
STAT_CELL_BIP_ERR_xx = 1 same as
CELL_BIP_ERR_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
[5]
STAT_B1_ERR_xx
STAT_B1_ERR_xx = 1 same as B1_ERR_xx
except that a 1 on this bit can NOT cause an
interrupt
Both
[6]
STAT_RX_FIFO_OVRUN_xx
STAT_RX_FIFO_OVRUN_xx = 1 same as
RX_FIFO_OVRUN_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
[7]
STAT_RDI_xx
STAT_RDI_xx = 1 same as RDI_xx except that
a 1 on this bit can NOT cause an interrupt
Both
3082C - AC
3083C - AD
3092C - BC
3093C - BD
[0:7]
LINK_NUM_RX_xx
00
Link number received that is stored in the F1
byte position of the SONET TOH
Both
3082E - AC
3083E AD
3092E- BC
3093E - BD
[0:5]
RSVD
00
Reserved
[6]
CH248_SYNC_xx
CH248_SYNC_xx = 1 indicates that A1A2 bytes
have been detected by link xx for multi-channel
alignment
SONET
[7]
RX_LINK_GOOD_xx
RX_LINK_GOOD_xx = 1 indicates that frame
has been acquired and the link has been stable.
Goes high at an A1A2 boundary but can go low
at any point in a frame due to excessive errors
Cell
Table 27. Per-Channel Status Register Descriptions – ORSO42G5 (Continued)
(0x)
Absolute
Address
Bit
Name
Reset
Value
(0x)
Description
Mode
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ORSO82G5 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:0.6 to 2.7 Gbps SONET Backplane Interface FPSCs
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ORSO82G5-1BM680I 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO82G5-1F680C 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO82G5-1F680I 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 2.7Gbits/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256