C161U
The External Bus Interface
Preliminary Data Sheet
200
02.2000
PRELIMINARY
PRE
LI
M
INAR
Y
- E
XC
ER
PT
-
SYSCON (FF12
H / 89H)
SFR
Reset Value: 0XX0
H
Note: Register SYSCON cannot be changed after execution of the EINIT instruction.
Bit SGTDIS controls the correct stack operation (push/pop of CSP or not) during
Bit
Function
XPER-SHARE Reserved
The XPER-SHARE mode, known from other C16x Infineon derivatives, is not
supported in the C161U. This bit must be set to ’0’ signal.
VISIBLE
Visible Mode Control
‘0’: Accesses to XBUS peripherals are done internally
‘1’: XBUS peripheral accesses are made visible on the external pins
XPEN
XBUS Peripheral Enable Bit
‘0’: Accesses to the on-chip X-Peripherals and their functions are disabled
‘1’: The on-chip X-Peripherals are enabled and can be accessed
OSCENBL
Oscillator Watchdog Enable Bit
‘0’: The oscillator watchdog is disabled. Default configuration.
‘1’: The oscillator watchdog is enabled.
WRCFG
Write Configuration Control (Set according to pin P0H.0 during reset)
‘0’: Pins WR and BHE retain their normal function
‘1’: Pin WR acts as WRL, pin BHE acts as WRH
CLKEN
System Clock Output Enable (CLKOUT)
‘0’: CLKOUT disabled: pin may be used for general purpose I/O
‘1’: CLKOUT enabled: pin outputs the system clock signal
BYTDIS
Disable/Enable Control for Pin BHE (Set according to data bus width)
‘0’: Pin BHE enabled
‘1’: Pin BHE disabled, pin may be used for general purpose I/O
ROMEN
Reserved
The ROMEN bit, known from other C16x Infineon derivatives, is not supported in
the C161U. This bit must be set to ’0’ signal.
SGTDIS
Segmentation Disable/Enable Control
‘0’: Segmentation enabled (CSP is saved/restored during interrupt entry/exit)
‘1’: Segmentation disabled (Only IP is saved/restored)
ROMS1
Reserved
The ROMS1 bit, known from other C16x Infineon derivatives, is not supported in
the C161U. This bit must be set to ’0’ signal.
STKSZ
System Stack Size
Selects the size of the system stack (in the internal RAM) from 32 to 1024 words
XPEN
XPER-
SHARE
VISI
BLE
-
ROM
S1
WR
CFG
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
rw
STKSZ
SGT
DIS
ROM
EN
rw
BYT
DIS
CLK
EN
rw
-
OSC
ENBL