C161U
System Programming
Preliminary Data Sheet
414
02.2000
PRELIMINARY
PRE
LI
M
INAR
Y
- E
XC
ER
PT
-
ATOMIC #3
;The next 3 instr. are locked (No NOP requ.)
MOV
R0, #1234H
;Instr. 1 (no other instr. enters pipeline!)
MOV
R1, #5678H
;Instr. 2
MUL
R0, R1
;Instr. 3: MUL regarded as one instruction
MOV
R2, MDL
;This instruction is out of the scope...
;...of the ATOMIC instruction sequence
21.9
Overriding the DPP Addressing Mechanism
The standard mechanism to access data locations uses one of the four data page
pointers (DPPx), which selects a 16 KByte data page, and a 14-bit offset within this data
page. The four DPPs allow immediate access to up to 64 KByte of data. In applications
with big data arrays, especially in HLL applications using large memory models, this may
require frequent reloading of the DPPs, even for single accesses.
The EXTP (extend page) instruction allows switching to an arbitrary data page for 1...4
instructions without having to change the current DPPs.
EXTP
R15, #1
;The override page number is stored in R15
MOV
R0, [R14]
;The (14-bit) page offset is stored in R14
MOV
R1, [R13]
;This instruction uses the std. DPP scheme!
The EXTS (extend segment) instruction allows switching to a 64 KByte segment
oriented data access scheme for 1...4 instructions without having to change the current
DPPs. In this case all 16 bits of the operand address are used as segment offset, with
the segment taken from the EXTS instruction. This greatly simplifies address calculation
with continuous data like huge arrays in “C”.
EXTS
#15, #1
;The override seg. is 15 (0F’0000H..0F’FFFFH)
MOV
R0, [R14]
;The (16-bit) segment offset is stored in R14
MOV
R1, [R13]
;This instruction uses the std. DPP scheme!
Note: Instructions EXTP and EXTS inhibit interrupts the same way as ATOMIC.
Short Addressing in the Extended SFR (ESFR) Space
The short addressing modes of the C161U (REG or BITOFF) implicitly access the SFR
space. The additional ESFR space would have to be accessed via long addressing
modes (MEM or [Rw]). The EXTR (extend register) instruction redirects accesses in
short addressing modes to the ESFR space for 1...4 instructions, so the additional
registers can be accessed this way, too.
The EXTPR and EXTSR instructions combine the DPP override mechanism with the
redirection to the ESFR space using a single instruction.