C161U
Power Reduction Modes
Preliminary Data Sheet
378
02.2000
PRELIMINARY
PRE
LI
M
INAR
Y
- E
XC
ER
PT
-
Register in Extended Power Management Module
:
Note: SYSCON1 is a protected register; its security level is automatically set to full write
protection after execution of EINIT instruction.
The power reduction modes Idle and power down are extended by the Infineons C16x
devices newly introduced sleep mode.
19.4.1
Sleep Mode
The Sleep mode is a new power management function which represents and is equal to
a Power Down mode but with exit/wakeup handling as in Idle mode. Wakeup from Sleep
state is possible with all external interrupts (including alternate sources e.g. from SSC
interface), with NMI and with RTC interrupts. As in Idle mode also PEC requests are
executed in Sleep mode, resulting in an interruption and resumption of Sleep mode. The
watchdog timer is stopped in Sleep mode. The contents of internal RAM and registers
are preserved through the voltage supplied via the VDD pins.
Generally, the external bus and the XBUS are released during Sleep mode if enabled by
the Hold Enable bit HLDEN in the last Program Status Word PSW. If enabled, the signal
HLDA is active as long as the Sleep mode (as well as the Idle or Power Down mode) is
active. Only when the clock is available again after wakeup, the HOLD request signal is
sampled and the HLDA state continued until HOLD is deactivated.
As in Power Down mode, the Sleep mode may also be combined with a running real time
clock RTC. In Sleep mode the oscillators (RTC and selected oscillator optionally), the
PLL as well as the whole clock system is stopped as in Power Down state. This implies,
that after wakeup the exit of Sleep mode normally is delayed by the ramp-up time of the
clock system (oscillator, PLL).
Sleep mode is entered after the standard IDLE instruction (protected 32 bit instruction)
has been executed and the instruction before the IDLE instruction has been completed.
The selection between standard Idle mode and Sleep mode is controlled with the new
register SYSCON1 (see below).
Note: Sleep mode cannot be entered in Slow Down mode - the start of sleep mode and
wakeup is only possible in the normal clocking mode (PLL or direct drive) as
defined with the startup configuration on port P0. If Sleep mode shall be entered
during Slow Down mode, automatically the standard Idle mode is selected as
configured with SYSCON3 register.
Register
Description
SYSCON1
System configuration control register for sleep management