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C161U
The Asynchronous/Synchr. Serial Interface
Preliminary Data Sheet
275
02.2000
PRELIMINARY
PRE
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INAR
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RP
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Figure 82
Asynchronous 9-Bit Frames
In wake-up mode received frames are only transferred to the receive buffer register, if
the 9th bit (the wake-up bit) is ‘1’. If this bit is ‘0’, no receive interrupt request will be
activated and no data will be transferred.
This feature may be used to control communication in multi-processor system:
When the master processor wants to transmit a block of data to one of several slaves, it
first sends out an address byte which identifies the target slave. An address byte differs
from a data byte in that the additional 9th bit is a '1' for an address byte and a '0' for a
data byte, so no slave will be interrupted by a data 'byte'. An address 'byte' will interrupt
all slaves (operating in 8-bit data + wake-up bit mode), so each slave can examine the 8
LSBs of the received character (the address). The addressed slave will switch to 9-bit
data mode (eg. by clearing bit CON_M.0), which enables it to also receive the data bytes
that will be coming (having the wake-up bit cleared). The slaves that were not being
addressed remain in 8-bit data + wake-up bit mode, ignoring the following data bytes
IrDA Frames
The modulation schemes of IrDA is based on standard asynchronous data transmission
frames. The asynchronous data format in IrDA mode (CON_M=010B) is defined as
follows :
1 start bit / 8 data bits / 1 stop bit
The coding/decoding of/to the asynchronous data frames is shown in Figure 83. In
general, during the IrDA transmissions UART frames are encoded into IR frames and
vice cersa. A low level on the IR frame indicates a “LED off“ state. A high level on the IR
frame indicates a “LED on“ state.
Bit 9
D7
D0
LSB
D1
D2
D3
D4
D5
D6
Start
Bit
9 Data Bits
11-/12-Bit UART Frame
(1st)
Stop
Bit
0
1
(2nd)
Stop
Bit
CON_M=100
B : Bit 9 = Data Bit D8
CON_M=101
B : Bit 9 = Wake-up Bit
CON_M=111
B : Bit 9 = Parity Bit