C161U
Memory Organization
Preliminary Data Sheet
52
02.2000
PRELIMINARY
PRE
LI
M
INAR
Y
- E
XC
ER
PT
-
Note: The upper 256 Bytes of SFR area, ESFR area and internal RAM are bit-
addressable (see shaded blocks in Figure 11).
Code accesses are always made on even byte addresses. The highest possible code
storage location in the internal RAM is either 00’FDFEH for single word instructions or
00’FDFCH for double word instructions. The respective location must contain a branch
instruction (unconditional), because sequential boundary crossing from internal RAM to
the SFR area is not supported and causes erroneous results.
Any word and byte data in the internal RAM can be accessed via indirect or long 16-bit
addressing modes, if the selected DPP register points to data page 3. Any word data
access is made on an even byte address. The highest possible word data storage
location in the internal RAM is 00’FDFEH. For PEC data transfers, the internal RAM can
be accessed independent of the contents of the DPP registers via the PEC source and
destination pointers.
The upper 256 Byte of the internal RAM (00’FD00H through 00’FDFFH) and the GPRs of
the current bank are provided for single bit storage, and thus they are bit addressable.
System Stack
The system stack may be defined within the internal RAM. The size of the system stack
is controlled by bitfield STKSZ in register SYSCON (see table below).
For all system stack operations the on-chip RAM is accessed via the Stack Pointer (SP)
register. The stack grows downward from higher towards lower RAM address locations.
Only word accesses are supported to the system stack. A stack overflow (STKOV) and
a stack underflow (STKUN) register are provided to control the lower and upper limits of
the selected stack area. These two stack boundary registers can be used not only for
protection against data destruction, but also allow to implement a circular stack with
hardware supported system stack flushing and filling (except for option ’111’).
The technique of implementing this circular stack is described in chapter “System
Programming”.
<STKSZ>
Stack Size (Words)
Internal RAM Addresses (Words)
0 0 0
B
256
00’FBFE
H...00’FA00H (Default after Reset)
0 0 1
B
128
00’FBFE
H...00’FB00H
0 1 0
B
64
00’FBFE
H...00’FB80H
0 1 1
B
32
00’FBFE
H...00’FBC0H
1 0 0
B
512
00’FBFE
H...00’F800H
1 0 1
B
---
Reserved. Do not use this combination.
1 1 0
B
---
Reserved. Do not use this combination.
1 1 1
B
1024
00’FDFE
H...00’F600H (Note: No circular stack)