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C161U
USB Interface Controller
Preliminary Data Sheet
353
02.2000
PRELIMINARY
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15.7.9
Suspend and Suspendoff
In normal operation, there is the UDC-clock of 48 MHz enabled and the normal CPU-
clock which may vary according to the divider in the clock-generation-unit.
If the host is sending a suspend-request (by driving an idle-state for more than 6 ms),
after 6 ms the suspend-interrupt will be generated. This must cause SW to go in low-
power mode. There are different modes in which the chip can be set. According to the
mode the wakeup initiated by the host, must be detected differently:
Using the bit 0 in clc register of every peripheral to turn off the clock. The suspendoff
interrupt is generated even though the rest of the usbblk is turned off.
Using the SYSCON3 register to turn off the clock of xbus and pdbus peripherals
(peripheral disable only). The SYSCON3 register is a write protected register and SW
first must go into low protected mode to be able to do this (see CSCU spec for further
explanation). In this mode also, the suspendoff interrupt is generated.
Using the SYSCON3 register group disable (msb of the register) to turn off all the xbus
and pdbus peripherals. In this mode, the normal suspendoff interrupt is not generated,
wakeup must be done with the falling edge of firq_alt(5).
Going into sleep mode which stops program execution and turns off the clock for most
of the entire chip. In this mode the firq_alt(5) is also generated and will wakeup the
cpu. Program execution will start with the interrupt procedure of the interrupt, or, if SW
was in an interrupt routine with a higher priority before, program execution will
continue at the point, it was stopped.
If SW wants to send a device-wakeup this feature must have been enabled by the host.
Whether this feature was enabled of not, is reflected in the STATUS3 register. If this
feature is enabled, and SW wants to wake up the USB, it must turn on the clocks and
write the resume-bit of the command-register. This will drive the non-idle-state on the
USB for 3 ms, host will start a wakeup-procedure.
15.7.10
Device disconnecting
Either our device is bus- or self-powered. In the case of being bus-powered, every time
the device is disconnected from the bus, the power supply will break down and a re-
plugging will restart with a reset of the entire chip.
In case of a self-powered device, if there is a disconnection from the USB, the logic of
the usbblk must be reset. There must be external logic added to provide the detection of
a disconnection. If SW detects a dis- and reconnection, it must disable all the epec
channels and reset the whole usbblk by writing into the usbd_cmd_reset register. After
de-asserting the reset, the whole configuration process (with writing of the configurator)
must be redone.