C161U
System Programming
Preliminary Data Sheet
415
02.2000
PRELIMINARY
PRE
LI
M
INAR
Y
- E
XCE
RP
T
-
Note: Instructions EXTR, EXTPR and EXTSR inhibit interrupts the same way as
ATOMIC.
The switching to the ESFR area and data page overriding is checked by the
development tools or handled automatically.
Nested Locked Sequences
Each of the described extension instruction and the ATOMIC instruction starts an
internal “extension counter” counting the effected instructions. When another extension
or ATOMIC instruction is contained in the current locked sequence this counter is
restarted with the value of the new instruction. This allows the construction of locked
sequences longer than 4 instructions.
Note: Interrupt latencies may be increased when using locked code sequences.
PEC requests are not serviced during idle mode, if the IDLE instruction is part of
a locked sequence.
Code Memory Configuration during Reset
The control input pin EA (External Access) enables the user to define the address area
from which the first instructions after reset are fetched. When EA is low (‘0’) during reset,
the internal code memory is disabled and the first instructions are fetched from external
memory. When EA is high (‘1’) during reset, the internal code memory is globally enabled
and the first instructions are fetched from the internal memory.
Enabling and Disabling the Internal Code Memory After Reset
If the internal code memory does not contain an appropriate startup code, the system
may be booted from external memory, while the internal memory is enabled afterwards
to provide access to library routines, tables, etc.
If the internal code memory only contains the startup code and/or test software, the
system may be booted from internal memory, which may then be disabled, after the
software has switched to executing from (eg.) external memory, in order to free the
address space occupied by the internal code memory, which is now unnecessary.
21.10
Pits, Traps and Mines
Although handling the internal code memory provides powerful means to enhance the
overall performance and flexibility of a system, extreme care must be taken in order to
avoid a system crash. Instruction memory is the most crucial resource for the C161U and
it must be made sure that it never runs out of it. The following precautions help to take
advantage of the methods mentioned above without jeopardizing system security.