C161U
The External Bus Interface
Preliminary Data Sheet
216
02.2000
PRELIMINARY
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10.7
The XBUS Interface
The C161U provides an on-chip interface (the XBUS interface), which allows to connect
integrated customer/application specific peripherals to the standard controller core. The
XBUS is an internal representation of the external bus interface, ie. it is operated in the
same way.
The current XBUS interface is prepared to support up to 3 X-Peripherals.
For each peripheral on the XBUS (X-Peripheral) there is a separate address window
controlled by an XBCON and an XADRS register. As an interface to a peripheral in many
cases is represented by just a few registers, the XADRS registers select smaller address
windows than the standard ADDRSEL registers. As the register pairs control integrated
peripherals rather than externally connected ones, they are fixed by mask programming
rather than being user programmable.
X-Peripheral accesses provide the same choices as external accesses, so these
peripherals may be bytewide or wordwide, with or without a separate address bus.
Interrupt nodes and configuration pins (on PORT0) are provided for X-Peripherals to be
integrated.
10.8
Initialization of the C161U’s X-peripherals
The following registers must be set for initialization of the C161U X-peripherals:
XPERCON-Register (Addr. F024, default: 0000):
Bit 6:
'1': USB module active '0': USB module switched-off
Bit 7:
'1': EPEC active
'0': EPEC switched-off
SYSCON-Register (Addr. FF12, default: 0xx0):
Bit 2:
'1': X-Peripherals enable
'0': X-Peripherals disable
Bit 1:
'1': X-Per accesses visible at externalXBUS'0': X-Per accesses not visible
SYSCON3-Register (Addr. F1D4, default: 0000):
Bit 15:
'1': All peripheral clocks disabled
'0': Individual disable control by
bits 14 thru 0
Bit 12:11: '00': USB transceiver in normal operation
’01’: Suspend mode, differential USB receiver switched off
’10’: Reserved, do not use this combination
’11’: USB transceiver switched off - full power down mode