- 您现在的位置：买卖IC网 > PDF目录1987 > AD9547BCPZ-REEL7 (Analog Devices Inc)IC CLOCK GEN/SYNCHRONIZR 64LFCSP PDF资料下载
参数资料
| 型号： | AD9547BCPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/104页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN/SYNCHRONIZR 64LFCSP |
| 产品变化通告： | AD9547 Mask Change 20/Oct/2010 |
| 标准包装： | 750 |
| 类型： | 时钟/频率发生器，同步器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，Stratum |
| 输入： | CMOS，LVDS，LVPECL |
| 输出： | CMOS，LVDS，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:2 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 750kHz |
| 电源电压： | 1.71 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页
AD9547
Data Sheet
Rev. E | Page 100 of 104
APPLICATIONS INFORMATION
POWER SUPPLY PARTITIONS
The AD9547 features multiple power supplies, and their power
consumption varies with the AD9547 configuration. This section
provides information about which power supplies can be grouped
together and how the power consumption of each block varies
with frequency.
The numbers quoted in this section are for comparison only. Refer
to the Specifications section for exact numbers. With each group,
bypass capacitors of 1 μF in parallel with 10 μF should be used.
Upon applying power to the device, internal circuitry monitors
the 1.8 V digital core supply and the 3.3 V digital I/O supply.
When these supplies cross the desired threshold level, the device
generates an internal10 μs reset pulse. This pulse does not appear
on the RESET pin.
3.3 V Supplies
The 3.3 V supply domain consists of two main partitions: digital
(DVDD3) and analog (AVDD3). These two supply domains
must be kept separate.
Furthermore, the AVDD3 consists of two subdomains: the clock
distribution output domain (Pin 25, Pin 31) and the rest of the
AVDD3 supply connections. Generally, the ADD3 supply domains
can be joined together. However, if an application requires 1.8 V
CMOS driver operation in the clock distribution output block,
provide one 1.8 V supply domain to power the clock distribution
output block. Each output driver has a dedicated supply pin, as
shown in Table 160.
Table 160. Output Driver Supply Pins
Output Driver
Supply Pin
OUT0
25
OUT1
31
1.8 V Supplies
The 1.8 V supply domain consists of two main partitions: digital
(DVDD) and analog (AVDD). These two supply domains must
be kept separate.
THERMAL PERFORMANCE
that TCASE is not exceeded, an airflowsource can be used. Use the
following equation to determine the junction temperature on
the application PCB:
TJ = TCASE + (ΨJT × PD)
where:
TJ is the junction temperature in degrees Celsius (°C).
TCASE is the case temperature in degrees Celsius (°C) measured
by the customer at the top center of the package.
PD is the power dissipation (see the Power Dissipation section).
Values of θJA are provided for package comparison and PCB design
considerations. θJA can be used for afirst-order approximation of TJ
using the following equation:
TJ = TA + (θJA × PD)
where TA is the ambient temperature in degrees Celsius (°C).
Values of θJC are provided for package comparison and PCB
design considerations when an external heat sink is required.
Values of θJB are provided for package comparison and PCB
design considerations.
Table 161. Thermal Parameters for the AD9547 64-Lead LFCSP Package
Symbol
Thermal Characteristic Using a JEDEC51-7 Plus JEDEC51-5 2S2P Test Board1
Value2
Unit
θJA
Junction-to-ambient thermal resistance, 0.0 m/sec air flow per JEDEC JESD51-2 (still air)
21.7
°C/W
θJMA
Junction-to-ambient thermal resistance, 1.0 m/sec air flow per JEDEC JESD51-6 (moving air)
18.9
°C/W
θJMA
Junction-to-ambient thermal resistance, 2.5 m/sec air flow per JEDEC JESD51-6 (moving air)
16.9
°C/W
θJB
Junction-to-board thermal resistance, per JEDEC JESD51-8 (still air)
11.3
°C/W
θJC
Junction-to-case thermal resistance
1.2
°C/W
ΨJT
Junction-to-top-of-package characterization parameter, 0 m/sec airflow per JEDEC JESD51-2 (still air)
0.1
°C/W
1
The exposed pad on the bottom of the package must be soldered to ground to achieve the specified thermal performance.
2
Results are from simulations. The PCB is a JEDEC multilayer type. Thermal performance for actual applications requires careful inspectionof the conditions in the
application to determine whether they are similar to those assumed in these calculations.
相关PDF资料 |
PDF描述 |
|---|---|
| AD9548BCPZ-REEL7 | IC CLOCK GEN/SYNCHRONIZR 88LFCSP |
| AD9549ABCPZ-REEL7 | IC CLOCK GEN/SYNCHRONIZR 64LFCSP |
| AD9550BCPZ-REEL7 | IC INTEGER-N TRANSLATOR 32-LFCSP |
| AD9551BCPZ | IC CLOCK GEN MULTISERV 40-LFCSP |
| AD9552BCPZ-REEL7 | IC PLL CLOCK GEN LP 32LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9548 | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad/Octal Input Network Clock Generator/Synchronizer |
| AD9548/PCBZ | 功能描述:BOARD EVAL FOR AD9548 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:PSoC® 主要目的:电源管理，热管理 嵌入式:- 已用 IC / 零件:- 主要属性:- 次要属性:- 已供物品:板，CD，电源 |
| AD9548/PCBZ | 制造商:Analog Devices 功能描述:Clock Generator Evaluation Board |
| AD9548BCPZ | 功能描述:IC CLOCK GEN/SYNCHRONIZR 88LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1 系列:- 类型:时钟/频率发生器，多路复用器 PLL:是 主要目的:存储器，RDRAM 输入:晶体 输出:LVCMOS 电路数:1 比率 - 输入:输出:1:2 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:Digi-Reel® 其它名称:296-6719-6 |
| AD9548BCPZ-REEL7 | 功能描述:IC CLOCK GEN/SYNCHRONIZR 88LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
发布紧急采购，3分钟左右您将得到回复。