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参数资料
| 型号： | AD9547BCPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/104页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN/SYNCHRONIZR 64LFCSP |
| 产品变化通告： | AD9547 Mask Change 20/Oct/2010 |
| 标准包装： | 750 |
| 类型： | 时钟/频率发生器，同步器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，Stratum |
| 输入： | CMOS，LVDS，LVPECL |
| 输出： | CMOS，LVDS，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:2 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 750kHz |
| 电源电压： | 1.71 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
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Data Sheet
AD9547
Rev. E | Page 101 of 104
CALCULATING THE DIGITAL FILTER COEFFICIENTS
The digital loop filter coefficients (α, β, γ, and δ, as shown in
associated with the equivalent analog circuit for a third-order loop
filter (see Figure 66). Note that AD9547 evaluation software
contains a profile designer that will compute these coefficients
for you.
R2
FROM
CHARGE
PUMP
TO
VCO
R3
C3
C1
C2
0
8300-
042
Figure 66. Third-Order Analog Loop Filter
The design process begins by deciding on two design parameters
related to the second-order loop filter shown in Figure 67: the
desired open-loop bandwidth (fP) and the phase margin (.
R2
FROM
CHARGE
PUMP
TO
VCO
C1
C2
0
8300-
043
Figure 67. Second-Order Analog Loop Filter
An analysis of the second-order loop filter leads to its primary
time constant, T1. It can be shown that T1 is expressible in terms
of fP and as
)
cos(
)
sin(
1
P
1
ω
T
where ωp = 2πfP
An analysis of the third-order loop filter leads to the definition
of another time constant, T3. It can be shown that T3 is expressible
in terms of the desired amount of additional attenuation intro-
duced by R3 and C3 at some specified frequency offset (fOFFSET)
from the PLL output frequency.
OFFSET
ATTEN
3
ω
T
1
10 10
where ωOFFSET = 2πfOFFSET
Note that ATTEN is the desired excess attenuation in decibels (dB).
Furthermore, ATTEN and ωOFFSET should be chosen so that
P
3
f
T
5
1
With an expression for T1 and T3, it is possible to define an adjusted
open-loop bandwidth (fC) that is slightly less than fP. It can be
shown that ωC (fC expressed as a radian frequency) is expressible
in terms of T1, T3, and θ (phase margin) as follows:
1
)
tan(
1
)
tan(
2
3
1
3
1
3
1
3
1
3
1
3
1
C
T
ω
It can also be shown that the adjusted open-loop bandwidth
leads to T2 (the secondary time constant of the second-order
loop filter), which is expressed as
3
1
C
2
T
ω
T
2
1
Calculation of the digital loop filter coefficients requires a
scaling constant, K (related to the system clock frequency, fS),
and the PLL feedback divide ratio, D.
S
f
K
33
2
125
,
578
,
517
,
30
1
V
U
S
D
where S, U, and V are the integer and fractional feedback divider
values that reside in the profile registers.
Keep in mind that the desired integer feedback divide ratio is one
more than the stored value of S (hence, the +1 term in the
equation for D in this equation). This leads to the digital filter
coefficients given by
2
2
1
2
C
3
C
1
C
1
2
C
T
ω
T
ω
T
ω
K
T
D
T
ω
α
2
1
S
T
f
β
1
32
1
ST
f
γ
32
3
ST
f
δ
32
Calculation of the coefficient register values requires the appli-
cation of some special functions, which are described as follows:
The if() function
y
= if (test_statement, true_value, false_value)
where:
test_statement
is a conditional expression (for example, x < 3).
true_value
is what y equals if the conditional expression is true.
false_value
is what y equals if the conditional expression is false.
The round() function
y
= round(x)
If x is an integer, then y = x. Otherwise, y is the nearest integer to x.
For example, round(2.1) = 2, round(2.5) = 3, and round(3.1) = 3.
The ceil() function
y
= ceil(x)
If x is an integer, then y = x. Otherwise, y is the next integer to
the right on the number line. For example, ceil(2.8) = 3,
whereas ceil(2.8) = 2.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9548 | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad/Octal Input Network Clock Generator/Synchronizer |
| AD9548/PCBZ | 功能描述:BOARD EVAL FOR AD9548 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:PSoC® 主要目的:电源管理，热管理 嵌入式:- 已用 IC / 零件:- 主要属性:- 次要属性:- 已供物品:板，CD，电源 |
| AD9548/PCBZ | 制造商:Analog Devices 功能描述:Clock Generator Evaluation Board |
| AD9548BCPZ | 功能描述:IC CLOCK GEN/SYNCHRONIZR 88LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1 系列:- 类型:时钟/频率发生器，多路复用器 PLL:是 主要目的:存储器，RDRAM 输入:晶体 输出:LVCMOS 电路数:1 比率 - 输入:输出:1:2 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:Digi-Reel® 其它名称:296-6719-6 |
| AD9548BCPZ-REEL7 | 功能描述:IC CLOCK GEN/SYNCHRONIZR 88LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
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