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| 型号： | AD9547BCPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 53/104页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN/SYNCHRONIZR 64LFCSP |
| 产品变化通告： | AD9547 Mask Change 20/Oct/2010 |
| 标准包装： | 750 |
| 类型： | 时钟/频率发生器，同步器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，Stratum |
| 输入： | CMOS，LVDS，LVPECL |
| 输出： | CMOS，LVDS，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:2 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 750kHz |
| 电源电压： | 1.71 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
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AD9547
Data Sheet
Rev. E | Page 52 of 104
SPI Instruction Word (16 Bits)
The MSB of the 16-bit instruction word is R/W, which indicates
whether the instruction is a read or a write. The next two bits, W1
and W0, indicate the number of bytes in the transfer (see Table 31).
The final 13 bits are the register address (A12 to A0), which indi-
cates the starting register address of the read/write operation
(see Table 33).
SPI MSB/LSB First Transfers
The AD9547 instruction word and payload can be MSB first or
LSB first. The default for the AD9547 is MSB first. The LSB-first
mode can be set by writing a 1 to Register 0x0000, Bit 6. Immedi-
ately after the LSB-first bit is set, subsequent serial control port
operations are LSB first.
When MSB-first mode is active, the instruction and data bytes
must be written from MSB to LSB. Multibyte data transfers in
MSB-first format start with an instruction byte that includes the
register address of the most significant payload byte. Subsequent
data bytes must follow in order from high address to low address.
In MSB-first mode, the serial control port internal address
generator decrements for each data byte of the multibyte
transfer cycle.
When Register 0x0000, Bit 6 = 1 (LSB first), the instruction and
data bytes must be written from LSB to MSB. Multibyte data trans-
fers in LSB-first format start with an instruction byte that includes
the register address of the least significant payload byte, followed
by multiple data bytes. The serial control port internal byte address
generator increments for each byte of the multibyte transfer cycle.
For multibyte MSB-first (default) I/O operations, the serial control
port register address decrements from the specified starting address
toward Address 0x0000. For multibyte LSB-first I/O operations,
the serial control port register address increments from the starting
address toward Address 0x1FFF. Unused addresses are not skipped
during multibyte I/O operations; therefore, the user should
write the default value to a reserved register and 0s to unmapped
registers. Note that it is more efficient to issue a new write
command than to write the default value to more than two
consecutive reserved (or unmapped) registers.
Table 32. Streaming Mode (No Addresses Are Skipped)
Write Mode
Address Direction
Stop Sequence
LSB First
Increment
0x0000 ... 0x1FFF
MSB First
Decrement
0x1FFF ... 0x0000
Table 33. Serial Control Port, 16-Bit Instruction Word, MSB First
MSB
LSB
I15
I14
I13
I12
I11
I10
I9
I8
I7
I6
I5
I4
I3
I2
I1
I0
R/W
W1
W0
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CS
SCLK DON'T CARE
SDIO
A12
W0
W1
R/W
A11 A10 A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D7 D6
D5
D4
D3
D2 D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
DON'T CARE
16-BIT INSTRUCTION HEADER
REGISTER (N) DATA
REGISTER (N – 1) DATA
0
8300
-02
9
Figure 52. Serial Control Port Write—MSB First, 16-Bit Instruction, Two Bytes of Data
CS
SCLK
SDIO
SDO
REGISTER (N) DATA
16-BIT INSTRUCTION HEADER
REGISTER (N – 1) DATA
REGISTER (N – 2) DATA
REGISTER (N – 3) DATA
A12
W0
W1
R/W
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
DON'T CARE
DON'T
CARE
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
08
300-
030
Figure 53. Serial Control Port Read—MSB First, 16-Bit Instruction, Four Bytes of Data
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