参数资料
型号: MT48H32M16LFB4-75B IT:C
厂商: Micron Technology Inc
文件页数: 33/85页
文件大小: 0K
描述: IC SDRAM 512MB 54VFBGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: 移动 SDRAM
存储容量: 512M(32Mx16)
速度: 133MHz
接口: 并联
电源电压: 1.7 V ~ 1.95 V
工作温度: -40°C ~ 85°C
封装/外壳: 54-VFBGA
供应商设备封装: 54-VFBGA(8x8)
包装: 散装

512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Truth Tables
Truth Tables
Table 18: Truth Table – Current State Bank n , Command to Bank n
Notes 1–6 apply to all parameters and conditions
Current State
CS#
RAS# CAS#
WE# Command/Action
Notes
Any
Idle
H
L
L
X
H
L
X
H
H
X
H
H
COMMAND INHIBIT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
ACTIVE (select and activate row)
L
L
L
L
L
L
L
L
H
H
L
L
AUTO REFRESH
LOAD MODE REGISTER
PRECHARGE
7
7
8
Row active
Read
(auto precharge disabled)
Write
(auto precharge disabled)
L
L
L
L
L
L
L
L
L
L
L
H
H
L
H
H
L
H
H
H
L
H
L
L
H
L
L
H
H
L
L
H
H
H
L
L
H
L
L
L
H
L
L
L
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (deactivate row in bank or banks)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (truncate READ burst, start PRECHARGE)
BURST TERMINATE
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE (truncate WRITE burst, start PRECHARGE)
BURST TERMINATE
9
9
10
9
9
10
9, 11
9
9
10
9, 11
Notes:
1. This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Table 20 (page 37))
and after t XSR has been met (if the previous state was self refresh).
2. This table is bank-specific, except where noted (for example, the current state is for a
specific bank and the commands shown can be issued to that bank when in that state).
Exceptions are covered below.
3. Current state definitions:
Idle : The bank has been precharged, and t RP has been met.
Row active : A row in the bank has been activated, and t RCD has been met. No data
bursts/accesses and no register accesses are in progress.
Read : A READ burst has been initiated, with auto precharge disabled, and has not yet
terminated or been terminated.
Write : A WRITE burst has been initiated, with auto precharge disabled, and has not yet
terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank.
COMMAND INHIBIT or NOP commands, or supported commands to the other bank
should be issued on any clock edge occurring during these states. Supported commands
to any other bank are determined by the bank’s current state and the conditions descri-
bed in this and the following table.
Precharging : Starts with registration of a PRECHARGE command and ends when t RP is
met. After t RP is met, the bank will be in the idle state.
Row activating : Starts with registration of an ACTIVE command and ends when t RCD is
met. After t RCD is met, the bank will be in the row active state.
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
33
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2011 Micron Technology, Inc. All rights reserved.
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