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| 型号： | MT46H16M32LFB5-6IT:C |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, PBGA90 |
| 封装： | 13 X 8 MM, GREEN, PLASTIC, VFBGA-90 |
| 文件页数： | 20/95页 |
| 文件大小： | 3228K |
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Table 12: Electrical Characteristics and Recommended AC Operating Conditions (Continued)
Notes 1–9 apply to all the parameters in this table; VDD/VDDQ = 1.70–1.95V
Parameter
Symbol
-5
-54
-6
-75
Unit Notes
Min
Max
Min
Max
Min
Max
Min
Max
PRECHARGE command pe-
riod
tRP
15
–
16.2
–
18
–
22.5
–
ns
DQS read preamble CL = 3
tRPRE
0.9
1.1
0.9
1.1
0.9
1.1
0.9
1.1
tCK
CL = 2
tRPRE
0.5
1.1
0.5
1.1
0.5
1.1
0.5
1.1
tCK
DQS read postamble
tRPST
0.4
0.6
0.4
0.6
0.4
0.6
0.4
0.6
tCK
Active bank a to active
bank b command
tRRD
10
–
10.8
–
12
–
15
–
ns
Read of SRR to next valid
command
tSRC
CL + 1
–
CL + 1
–
CL + 1
–
CL + 1
–
tCK
SRR to read
tSRR
2
–
2
–
2
–
2
–
tCK
DQS write preamble
tWPRE
0.25
–
0.25
–
0.25
–
0.25
–
tCK
DQS write preamble setup
time
tWPRES
0
–
0
–
0
–
0
–
ns
DQS write postamble
tWPST
0.4
0.6
0.4
0.6
0.4
0.6
0.4
0.6
tCK
Write recovery time
tWR
15
–
15
–
15
–
15
–
ns
Internal WRITE-to-READ
command delay
tWTR
2
–
2
–
1
–
1
–
tCK
Exit power-down mode to
first valid command
tXP
2
–
2
–
1
–
1
–
tCK
Exit self refresh to first
valid command
tXSR
112.5
–
112.5
–
112.5
–
112.5
–
ns
Notes: 1. All voltages referenced to VSS.
2. All parameters assume proper device initialization.
3. Tests for AC timing and electrical AC and DC characteristics may be conducted at nomi-
nal supply voltage levels, but the related specifications and device operation are guaran-
teed for the full voltage ranges specified.
4. The circuit shown below represents the timing reference load used in defining the rele-
vant timing parameters of the device. It is not intended to be either a precise representa-
tion of the typical system environment or a depiction of the actual load presented by a
production tester. System designers will use IBIS or other simulation tools to correlate
the timing reference load to system environment. Specifications are correlated to produc-
tion test conditions (generally a coaxial transmission line terminated at the tester elec-
tronics). For the half-strength driver with a nominal 10pF load, parameters tAC and tQH
are expected to be in the same range. However, these parameters are not subject to
production test but are estimated by design/characterization. Use of IBIS or other simula-
tion tools for system design validation is suggested.
I/O
20pF
I/O
10pF
Full drive strength
Half drive strength
50
Micron Confidential and Proprietary
Advance
512Mb: x16, x32 Mobile LPDDR SDRAM
Electrical Specifications – AC Operating Conditions
PDF: 09005aef83dd2b3e
t67m_512mb_mobile_lpddr.pdf - Rev. B 2/10 EN
27
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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