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参数资料
| 型号： | MT46H16M32LFB5-6IT:C |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, PBGA90 |
| 封装： | 13 X 8 MM, GREEN, PLASTIC, VFBGA-90 |
| 文件页数： | 37/95页 |
| 文件大小： | 3228K |
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Read with auto-precharge enabled: Starts with registration of a READ command with
auto precharge enabled and ends when tRP has been met. After tRP is met, the bank will
be in the idle state.
Write with auto-precharge enabled: Starts with registration of a WRITE command with
auto precharge enabled and ends when tRP has been met. After tRP is met, the bank
will be in the idle state.
5. The states listed below must not be interrupted by any executable command; DESELECT
or NOP commands must be applied on each positive clock edge during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when tRFC
is met. After tRFC is met, the device will be in the all banks idle state.
Accessing mode register: Starts with registration of a LOAD MODE REGISTER command
and ends when tMRD has been met. After tMRD is met, the device will be in the all
banks idle state.
Precharging all: Starts with registration of a PRECHARGE ALL command and ends when
tRP is met. After tRP is met, all banks will be in the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle, and bursts are not in progress.
8. May or may not be bank-specific; if multiple banks need to be precharged, each must be
in a valid state for precharging.
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of
bank.
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with
auto precharge enabled and READs or WRITEs with auto precharge disabled.
11. Requires appropriate DM masking.
12. A WRITE command can be applied after the completion of the READ burst; otherwise, a
BURST TERMINATE must be used to end the READ burst prior to asserting a WRITE com-
mand.
Table 19: Truth Table – Current State Bank n – Command to Bank m
Notes 1–6 apply to all parameters in this table
Current State
CS#
RAS#
CAS#
WE# Command/Action
Notes
Any
H
X
DESELECT (NOP/continue previous operation)
L
H
NO OPERATION (NOP/continue previous operation)
Idle
X
Any command supported to bank m
Row activating,
active, or pre-
charging
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start READ burst)
L
H
L
WRITE (select column and start WRITE burst)
L
H
L
PRECHARGE
Read (auto pre-
charge disabled)
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start new READ burst)
L
H
L
WRITE (select column and start WRITE burst)
L
H
L
PRECHARGE
Write (auto pre-
charge disabled)
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start READ burst)
L
H
L
WRITE (select column and start new WRITE burst)
L
H
L
PRECHARGE
Micron Confidential and Proprietary
Advance
512Mb: x16, x32 Mobile LPDDR SDRAM
Truth Tables
PDF: 09005aef83dd2b3e
t67m_512mb_mobile_lpddr.pdf - Rev. B 2/10 EN
42
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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