- 您现在的位置：买卖IC网 > PDF目录262949 > MT46H16M32LFB5-6IT:C 16M X 32 DDR DRAM, PBGA90 PDF资料下载
参数资料
| 型号： | MT46H16M32LFB5-6IT:C |
| 元件分类： | DRAM |
| 英文描述： | 16M X 32 DDR DRAM, PBGA90 |
| 封装： | 13 X 8 MM, GREEN, PLASTIC, VFBGA-90 |
| 文件页数： | 50/95页 |
| 文件大小： | 3228K |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页当前第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页
Extended Mode Register
The EMR controls additional functions beyond those set by the mode registers. These
additional functions include drive strength, TCSR, and PASR.
The EMR is programmed via the LOAD MODE REGISTER command with BA0 = 0 and
BA1 = 1. Information in the EMR will be retained until it is programmed again, the de-
vice goes into deep power-down mode, or the device loses power.
Figure 19: Extended Mode Register
Extended mode
register (Ex)
Address bus
9
7
6
5
4
3
8
2
1
PASR
TCSR1
DS
Operation
0
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
10
...
E2
0
1
E1
0
1
0
1
E0
0
1
0
1
0
1
0
1
Partial-Array Self Refresh Coverage
Full array
1/2 array
1/4 array
Reserved
1/8 array
1/16 array
Reserved
BA0
...
BA1
1
n
n+ 1
n+ 2
0
E10
0
–
...
0
–
En
0
–
E9
0
E8
0
–
Normal AR operation
All other states reserved
An
E6
0
1
0
1
E7
0
1
E5
0
1
0
1
0
1
0
1
Drive Strength
Full strength
1/2 strength
1/4 strength
3/4 strength
Reserved
E7–E0
Valid
–
En + 2
0
1
En + 1
0
1
0
1
Mode Register Definition
Standard mode register
Status register
Extended mode register
Reserved
Notes: 1. On-die temperature sensor is used in place of TCSR. Setting these bits will have no effect.
2. The integer n is equal to the most significant address bit.
Temperature-Compensated Self Refresh
This device includes a temperature sensor that is implemented for automatic control of
the self refresh oscillator. Programming the temperature-compensated self refresh
(TCSR) bits will have no effect on the device. The self refresh oscillator will continue to
refresh at the optimal factory-programmed rate for the device temperature.
Micron Confidential and Proprietary
Advance
512Mb: x16, x32 Mobile LPDDR SDRAM
Extended Mode Register
PDF: 09005aef83dd2b3e
t67m_512mb_mobile_lpddr.pdf - Rev. B 2/10 EN
54
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
相关PDF资料 |
PDF描述 |
|---|---|
| ML1I-65656L-100CB | 32K X 8 STANDARD SRAM, 100 ns, CDIP28 |
| M95160-MB6TP | 2K X 8 SPI BUS SERIAL EEPROM, DSO8 |
| M95160-WMB3T | 2K X 8 SPI BUS SERIAL EEPROM, DSO8 |
| MT45W2MV16BAFB-601WT | 2M X 16 PSEUDO STATIC RAM, 60 ns, PBGA54 |
| MT45W2MV16BAFB-706LIT | 2M X 16 PSEUDO STATIC RAM, 70 ns, PBGA54 |
相关代理商/技术参数 |
参数描述 |
|---|
发布紧急采购，3分钟左右您将得到回复。