- 您现在的位置：买卖IC网 > PDF目录85254 > SPMC16V1CPU20 (MOTOROLA INC) 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100 PDF资料下载
参数资料
| 型号： | SPMC16V1CPU20 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 70/128页 |
| 文件大小： | 571K |
| 代理商： | SPMC16V1CPU20 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页当前第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页
MOTOROLA
MC68HC16V1
46
MC68HC16V1TS/D
Interrupt recognition is based on the states of the IRQ7, IRQ2, IRQX, and the IP mask value set in the
CPU16 condition code register (CCR). Each of the signals corresponds to an interrupt priority. IRQ2
has the lowest priority, IRQ7 has the highest priority. IRQX has a user-definable priority based on the
setting of the IRQXL[2:0] bits in PFLVR. Refer to 3.8.5 Port F Operation for more information on the
port F interrupt level register (PFLVR).
The IP field consists of three bits (CCR[7:5]). Binary values %000 to %111 provide eight priority masks.
Masks prevent an interrupt request of a priority less than or equal to the mask value (except for IRQ7)
from being recognized and processed. When IP contains %000, no interrupt is masked. During excep-
tion processing, the IP field is set to the priority of the interrupt being serviced.
Interrupt request signals can be asserted by external devices or by microcontroller modules. Request
lines are connected internally by means of a wired NOR. Simultaneous requests of differing priority can
be made. Internal assertion of an interrupt request signal does not affect the logic state of the corre-
sponding MCU pin.
External interrupt requests are routed to the CPU16 via the external bus interface and SLIM interrupt
control logic. The CPU treats external interrupt requests as though they come from the SLIM.
IRQ7, IRQ2, and IRQX can be configured as active-low level-sensitive or edge detect inputs. They may
also be configured as general-purpose I/O pins, or edge detect pins, in which case they exist but do not
support the IRQ function. Control bits in the port F pin assignment register are used to assign the func-
tion. Refer to 3.8.5 Port F Operation for more information.
IRQ7 is a non-maskable interrupt that is input transition sensitive in order to prevent redundant servicing
and stack overflow. A non-maskable interrupt is generated each time IRQ7 is asserted, and each time
the priority mask changes from %111 to a lower number while IRQ7 is asserted.
IRQ2 and IRQX are maskable interrupts. IRQ2 asserts fixed interrupt priority level 2. IRQX can assert
any interrupt priority level as configured in the port F priority level register (PFLVR). Refer to 3.8.5 Port
F Operation for more information.
Interrupt requests are sampled on consecutive falling edges of the system clock. Interrupt request input
circuitry has hysteresis. To be valid, a request signal must be asserted for at least two consecutive clock
periods. Valid requests do not cause immediate exception processing, but are left pending. Pending re-
quests are processed at instruction boundaries or when exception processing of higher-priority excep-
tions is complete.
The CPU16 does not latch the priority of a pending interrupt request. If an interrupt source of higher
priority makes a service request while a lower priority request is pending, the higher priority request is
serviced. If an interrupt request of equal or lower priority than the current IP mask value is made, the
CPU does not recognize the occurrence of the request in any way.
相关PDF资料 |
PDF描述 |
|---|---|
| S1C60N05F0A0100 | MICROCONTROLLER, PQFP60 |
| SC3S12P128J0CLHR | 16-BIT, MROM, 1.05 MHz, MICROCONTROLLER, PQFP64 |
| SC3S12P128J0CLH | 16-BIT, MROM, 1.05 MHz, MICROCONTROLLER, PQFP64 |
| SC3S12P128J0CQKR | 16-BIT, MROM, 1.05 MHz, MICROCONTROLLER, PQFP80 |
| S908QY2AD1MDW | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SPMC387-01 | 制造商:SSDI 制造商全称:Solid States Devices, Inc 功能描述:50 WATT RADIATION HARDENED DC-DC POWER CONVERTER |
| SPMC68CK338CPV14 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:32-Bit Modular Microcontroller |
| SPMC802B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:32-pin General Purpose Microcontroller (OTP) |
| SPMC802B-C | 制造商:未知厂家 制造商全称:未知厂家 功能描述:32-pin General Purpose Microcontroller (OTP) |
| SPMC802B-PD03 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:32-pin General Purpose Microcontroller (OTP) |
发布紧急采购，3分钟左右您将得到回复。