
MC68HC16V1
MOTOROLA
MC68HC16V1TS/D
53
The port E output data register latches the data to be driven on the port E output pins. When read, this
register always reflects the current state of the data latches. Power-on reset can change the state of
these latches. All other sources of reset have no effect.
When read, the port E pin data register reflects the current state of the port E pins, regardless of whether
the pins are configured as inputs or outputs. Writes have no effect.
Port E data direction register bits control the direction of the port E pin drivers when the pins are con-
figured as I/O pins. When any bit in this register is set to one, the corresponding pin is configured as an
output. When any bit in this register is cleared to zero, the corresponding pin is configured as an input.
Reset clears all bits to zero.
Port E pin assignment register bits control the function of each port E pin. Refer to Table 34. When any
bit in this register is set to one, the corresponding pin is configured as its primary function. When any
bit in this register is cleared to zero, the corresponding pin is configured as an I/O pin controlled by the
port E output data and data direction registers.
The SLIM mode configured during reset and the state of bits in the port/clock configuration shadow reg-
ister are used to configure PEPAR during reset. Shadow register configuration can be overridden by
external pins during reset.
PORTE — Port E Output Data Register
$YFFA21
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
RESET:
U
PORTEP — Port E Pin Data Register
$YFFA23
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
PEP7
PEP6
PEP5
PEP4
PEP3
PEP2
PEP1
PEP0
RESET:
CURRENT STATE OF CORRESPONDING PINS
DDRE — Port E Data Direction Register
$YFFA25
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
DDE7
DDE6
DDE5
DDE4
DDE3
DDE2
DDE1
DDE0
RESET:
0
PEPAR — Port E Pin Assignment Register
$YFFA27
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NOT USED
PEPA7
PEPA6
PEPA5
PEPA4
PEPA3
PEPA2
PEPA1
PEPA0
RESET (EXPANDED MODE):
PCON3 PCON3 PCON3 PCON1
1
RESET (SINGLE-CHIP MODE):
0
PCON1
0