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参数资料
| 型号： | SPMC16V1CPU20 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 88/128页 |
| 文件大小： | 571K |
| 代理商： | SPMC16V1CPU20 |
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MOTOROLA
MC68HC16V1
62
MC68HC16V1TS/D
SIZ[A:C] — Chip Select Port Size
These bits determine the port size for each chip select as 8 or 16 bits. The state of these bits at reset
is determined by the corresponding mask-programmed shadow bits in the port/clock configuration
shadow register (PCON).
0 = 8-bit port.
1 = 16-bit port.
RWEN — Read and Write Strobe Enable
0 = R/W and DS pins function normally.
1 = R/W becomes WR; DS becomes RD.
3.9.4 Chip-Select Base Address Registers
The base address is the starting address for a block enabled by the given chip select. The block size
determines the extent of the address space from its base address. Each chip-select has an associated
base address register so that an efficient address map can be constructed for each application.
CSBARB, the option register for CSB, contains special reset values that support bootstrap operation
from peripheral memory devices.
*ADDR[23:20] follow the state of ADDR19 in the MC68HC16V1. Therefore, ADDR[23:20] must match
ADDR19 in the chip-select base address registers for the chip-select to be active.
ADDR[23:11] — Base Address Field
This field sets the starting address of a particular address space. The address compare logic uses only
the most significant bits to match an address within a block. The value of the base address must be a
multiple of block size.
NOTE
Because ADDR[23:20] follow the state of ADDR19 in the CPU16, the maximum
block size is 512 Kbytes. For this same reason, addresses from $080000 to
$F7FFFF are inaccessible. Blocks can be based above this dead zone, but the ef-
fect of ADDR19 must be considered.
CSBARA — Chip-Select Base Address Register A
$YFFA60
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23*
ADDR
22*
ADDR
21*
ADDR
20*
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
CSBARB — Chip-Select Base Address Register B
$YFFA64
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23*
ADDR
22*
ADDR
21*
ADDR
20*
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
1
CSBARC — Chip-Select Base Address Register C
$YFFA68
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23*
ADDR
22*
ADDR
21*
ADDR
20*
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
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