参数资料
| 型号： | ADP1046ACPZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/92页 |
| 文件大小： | 0K |
| 描述： | IC DGTL CTRLR 32LFCSP |
| 标准包装： | 5,000 |
| 应用： | 电源 |
| 输入电压： | 0 V ~ 1.6 V |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 20mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-WQ（5x5） |
| 包装： | 带卷 (TR) |
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Data Sheet
THEORY OF OPERATION
CURRENT SENSE
The ADP1046 has two current sense inputs: CS1 and CS2±.
These inputs sense, protect, and control the primary input
current, secondary output current, and the share bus
information. They can be calibrated to reduce errors due to
external components.
CS1 Operation (CS1)
CS1 is typically used for the monitoring and protection of
the primary side current, which is commonly sensed using a
current transformer (CT). The input signal at the CS1 pin is fed
into an ADC for current monitoring. The range of the ADC is
0 V to 1.4 V. The input signal is also fed into a comparator for
pulse-by-pulse OCP protection. The typical configuration for
V IN
ADP1046
When using low-side current sensing, the current sources are
200 μA; therefore, the required resistor value is 1 V/200 μA = 5 kΩ.
When using high-side current sensing, the current sources are
2 mA; therefore, the resistor value required is (V OUT ? 1 V)/2 mA.
In the case of V OUT = 12 V, the required resistor value is 5.5 kΩ.
Various thresholds and limits can be set for CS2±, such as OCP.
When not in use, the CS2+ and CS2? inputs should both be
connected directly to PGND, and CS2± should be set to high-
side current sense mode (Register 0x27[2] = 1).
The CS2 ADC is used to measure the CS2 current; the reading
is averaged every 2.62 ms in an asynchronous fashion. This
averaged reading is used to make fault decisions, such as the
OUTA
OUTB
OUTC
OUTD
CS2 OCP fault. The ADP1046 also writes the 12-bit CS2
reading every 10 ms to Register 0x18.
I
12V
I = 10A
1k?
10?
1V
I = 100mA
CS1
ADC
12 BITS
5.5k?
CS2+
5.5k?
CS2–
V REF
FAST
1:100
OCP
1V
ADC
12 BITS
Figure 13. Current Sense 1 (CS1) Operation
2mA
2mA
The CS1 ADC is used to measure the average value of the
primary current; the reading is averaged every 2.62 ms in an
asynchronous fashion to make fault decisions. The ADP1046
also writes the 12-bit CS1 reading every 10 ms to Register 0x13.
The fast OCP comparator is used to limit the instantaneous
Figure 14. High-Side Resistive Current Sense
I
primary current within each switching cycle and has a nominal
threshold of 1.2 V.
Various thresholds and limits can be set for CS1, as described in
5k?
CS2–
5k?
CS2+
the Current Sense and Current Limit Registers section.
1V
ADC
12 BITS
CS2 Operation (CS2+, CS2?)
CS2+ and CS2? are differential inputs used for the monitoring
200μA
200μA
and protection of the secondary side current. The full-scale
range of the CS2 ADC is programmable to 60 mV or 120 mV.
The differential inputs are fed into an ADC through a pair of
external resistors that provide the necessary level shifting. The
device pins, CS2+ and CS2?, are internally regulated to approxi-
mately 1 V by internal current sources.
Rev. B | Page 15 of 92
Figure 15. Low-Side Resistive Current Sense (Recommended)
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