参数资料
| 型号： | ADP1046ACPZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 31/92页 |
| 文件大小： | 0K |
| 描述： | IC DGTL CTRLR 32LFCSP |
| 标准包装： | 5,000 |
| 应用： | 电源 |
| 输入电压： | 0 V ~ 1.6 V |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 20mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-WQ（5x5） |
| 包装： | 带卷 (TR) |
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Data Sheet
UNDERVOLTAGE PROTECTION (UVP)
If the voltage sensed at the VS1 pin falls below the program-
mable UVP threshold, the UVP flag is set. The UVP threshold
is programmed in Register 0x34; the GUI can also be used, as
The response to the UVP flag is programmable in Register
0x0B[3:0]. Undervoltage protection and the UVP flag are
disabled during soft start.
AC SENSE (ACSNS)
The ACSNS circuit performs multiple monitoring and control
functions. Two ADCs and a fast comparator are connected to
this pin.
? The fast ADC is used for the voltage feedforward function
(see the Voltage Line Feedforward and ACSNS section).
This ADC has an equivalent resolution of 11 bits at 10 μs.
? The slow ADC is used to report the input voltage. This
ADC has a resolution of 12 bits at 10 ms.
? The fast comparator is used to monitor whether a
switching waveform is present at the output of the
synchronous rectifier stage (or rectifier diodes).
The pick-off point upstream of the output inductor is connected
to the ACSNS pin through an external RCD divider network.
ADP1046
The equation to calculate the ADC code is given by the
following formula:
ADC Code = Vx /1.6 × 4096
where Vx is the voltage at the ACSNS pin.
For example, when there is 1 V on the input of the ADC
ADC Code = 1 V/1.6 × 4096
ADC Code = 2560
V SENSE = ( Vx ) × ( R1 + R2 )/ R2
where V SENSE is the filtered secondary voltage.
The primary input voltage can be calculated by multiplying
V SENSE by the turns ratio (N1/N2) as follows:
V PRIMARY = Vx × ( R1 + R2 )/ R2 × ( N1 / N2 )
The ACSNS comparator threshold is set at 0.45 V. If the average
voltage on the ACSNS pin falls below this threshold, the ACSNS
flag is set in Register 0x03[2] and in Register 0x07[2] (real-time
and latched flag registers, respectively), and the programmed
action for the flag is executed.
When operating in resonant mode, the ACSNS comparator is
used for the timing of the synchronous rectifiers and, therefore,
the additional features of the ADC cannot be used. For more
information, see the Resonant Mode Operation section.
The output of the ACSNS slow ADC is a 12-bit value reported
in Register 0x14. The gain of this ADC can be adjusted using
Register 0x5E[6:0] to compensate for divider errors and the
voltage spike.
Figure 41. Voltage Sense Window in Simulation Mode (ADP1046 GUI)
Rev. B | Page 31 of 92
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