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参数资料
| 型号： | IPR-SDRAM/DDR2 |
| 厂商： | Altera |
| 文件页数： | 10/106页 |
| 文件大小： | 0K |
| 描述： | IP DDR2 SDRAM CONTROLLER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | DDR2 SDRAM 控制器 |
| 许可证： | 续用许可证 |
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1–6
Chapter 1: About This Compiler
Installation and Licensing
Controller Compiler, where < path > is the installation directory. The default
installation directory on Windows is c:\altera <version> ; on Linux it is
/opt/altera <version> .
Figure 1–2. Directory Structure
<path>
Installation directory.
ip
Contains the Altera MegaCore IP Library and third-party IP cores.
altera
Contains the Altera MegaCore IP Library.
common
Contains shared components.
ddr_ddr2_sdram
Contains the DDR and DDR2 SDRAM Controller Compiler files and documentation.
constraints
Contains scripts that generate an instance-specific Tcl script for each instance of the DDR and DDR2
SDRAM Controller Compiler in various Altera devices.
dat
Contains a data file for each Altera device combination that is used by the Tcl script to generate the
instance-specific Tcl script.
doc
Contains the documentation for the DDR and DDR2 SDRAM Controller Compiler.
lib
Contains encrypted lower-level design files and other support files.
system_timing
Contains system timing analysis scripts and associated files.
OpenCore Plus Evaluation
With Altera’s free OpenCore Plus evaluation feature, you can perform the following
actions:
■
■
■
■
Simulate the behavior of a megafunction (Altera MegaCore function or AMPP SM
megafunction) within your system
Verify the functionality of your design, as well as evaluate its size and speed
quickly and easily
Generate time-limited device programming files for designs that include
MegaCore functions
Program a device and verify your design in hardware
You only need to purchase a license for the megafunction when you are completely
satisfied with its functionality and performance, and want to take your design to
production.
f
For more information on OpenCore Plus hardware evaluation using the DDR and
March 2009 Altera Corporation
相关PDF资料 |
PDF描述 |
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| GEM31DTBN-S189 | CONN EDGECARD 62POS R/A .156 SLD |
| GEM31DTBH-S189 | CONN EDGECARD 62POS R/A .156 SLD |
| GEM31DTBD-S189 | CONN EDGECARD 62POS R/A .156 SLD |
| GEM31DTAN-S189 | CONN EDGECARD 62POS R/A .156 SLD |
| 10YXJ2200M10X20 | CAP ALUM 2200UF 10V 20% RADIAL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IP-RSENC | 功能描述:开发软件 Reed-Solomon Encoder MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SLITE2 | 功能描述:开发软件 SerialLite II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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