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参数资料
| 型号： | IPR-SDRAM/DDR2 |
| 厂商： | Altera |
| 文件页数： | 58/106页 |
| 文件大小： | 0K |
| 描述： | IP DDR2 SDRAM CONTROLLER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | DDR2 SDRAM 控制器 |
| 许可证： | 续用许可证 |
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3–22
Chapter 3: Functional Description
Interfaces & Signals
Figure 3–14. Reads
[1] [2]
[3]
[4]
[5]
clk
Local Interface
local_read_req
local_write_req
local_ready
local_size
0
4
2
1
0
local_cs_addr (1)
local_row_addr (1)
0
170
1
040
0
000
local_bank_addr (1)
local_col_addr (1)
0
1
050 055 057
0
000
local_rdata_valid
local_rdata
534 8 8 6F4
D310
77F4
0479
54B0
CB4 8
DDR SDRAM
Interface
ddr_cs_n
F
E
F
E
F
D
F
D
F
D
F
ddr_cke
F
ddr_a
ddr_ba
000
0
170 000 0A0
1
0
1
000
040 000 0AA
000
0
0AE
000
DDR Command (2)
NOP
ACT
NOP
RD
NOP
ACT
NOP
RD
NOP
BT RD BT
NOP
ddr_ras_n
ddr_cas_n
ddr_we_n
ddr_dm
ddr_dq
ddr_dqs
(1) The local_cs_addr , local_row_addr , local_bank_addr , and local_col_addr signals are a representation of the
local_addr signal.
(2) DDR Command shows the command that the command signals are issuing.
1. The user logic requests the first read by asserting the local_read_req signal,
and the size and address for this read. In this example, the request is a burst of
length 4 (8 on the DDR SDRAM side). The local_ready signal is asserted, which
indicates that the controller has accepted this request, and the user logic can
request another read or write in the following clock cycle. If the local_ready
signal was not asserted, the user logic must keep the read request, size, and
address signals asserted.
2. The user logic requests a second read to a different address, this time of size 2 (4
on the DDR SDRAM side). The local_ready signal remains asserted, which
indicates that the controller has accepted the request.
3. The user logic requests a third read to a different address, this time of size 1 (2 on
the DDR SDRAM side). The local_ready signal remains asserted, which
indicates that the controller has accepted the request.
? March 2009 Altera Corporation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IP-RSENC | 功能描述:开发软件 Reed-Solomon Encoder MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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