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参数资料
| 型号： | MT48V8M16LFB4-75M:G |
| 元件分类： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54 |
| 封装： | 8 X 8 MM, LEAD FREE, VFBGA-54 |
| 文件页数： | 14/80页 |
| 文件大小： | 2775K |
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PDF: 09005aef807f4885/Source: 09005aef8071a76b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
21
2001 Micron Technology, Inc. All rights reserved.
128Mb: x16, x32 Mobile SDRAM
Register Definition
Operating Mode
The normal operating mode is selected by setting M7, M8, M10, and M11 to zero; all the
other combinations of values for M7, M8, M10, and M11 are reserved for future use and/
or test modes.
Test modes and reserved states should not be used because unknown operation or
incompatibility with future versions may result.
Extended Mode Register
The extended mode register controls the functions beyond those controlled by the mode
register. These additional functions are special features of the Mobile device. They
include TCSR and PASR.
Figure 9:
Extended Mode Register
Notes:
1. E13 and E12 (BA1 and BA0) must be “1, 0” to select the extended mode register (vs. the
base mode register).
2. RFU: reserved for future use.
The extended mode register is programmed via the MODE REGISTER SET command
(BA1 = 1, BA0 = 0) and retains the stored information until it is programmed again or the
device loses power.
The extended mode register must be programmed with E5 through E11 set to “0.” The
extended mode register must be loaded when all banks are idle and no bursts are in
progress, and the controller must wait the specified time before initiating any subse-
quent operation. Violating either of these requirements results in unspecified operation.
The extended mode register must be programmed to ensure proper operation.
Temperature-Compensated Self Refresh (TCSR)
TCSR allows the controller to program the refresh interval during self refresh mode,
according to the case temperature of the Mobile device. This allows great power savings
during self refresh during most operating temperature ranges. Only during extreme
temperatures would the controller have to select a higher TCSR level that will guarantee
data during self refresh.
9
7
6
5
4
3
8
2
1
PASR
TCSR
set to “0”
EMR
E13 E12
A11
E11
A10
E10
A9
E9
A8
E8
A7
E7
A6
E6
A5
E5
A4
E4
A3
E3
A2
E2
A1
E1
A0
E0
10
11
12
13
Partial-Array Self Refresh Coverage
FullArray (All Banks)
Half Array (BA1 = 0)
Quarter Array (BA1 = BA0 = 0)
RFU
BA1BA0
E13
0
1
Mode Register Definition
Mode Register
Reserved
Extended Mode Register
Resereved
E12
0
1
0
1
0
E11
0
–
E10
0
–
E9
0
–
E8
0
–
E7
0
–
E4 E3 E2 E1 E0
Valid
–
Operating Mode
Normal Operation
All other states reserved
Extended Mode
Register (Ex)
E6
0
–
E5
0
–
E2
0
1
E1
0
1
0
1
E0
0
1
0
1
0
1
0
1
Maximum Case Temp.
85°C
70°C
45°C
15°C
E4
1
0
1
E3
1
0
1
0
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相关代理商/技术参数 |
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|---|---|
| MT48V8M16LFB4-8 ITG | 制造商:Micron Technology Inc 功能描述:DRAM Chip Mobile SDRAM 128M-Bit 8Mx16 2.5V 54-Pin VFBGA Tray |
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