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参数资料
| 型号： | MT48V8M16LFB4-75M:G |
| 元件分类： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54 |
| 封装： | 8 X 8 MM, LEAD FREE, VFBGA-54 |
| 文件页数： | 42/80页 |
| 文件大小： | 2775K |
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PDF: 09005aef807f4885/Source: 09005aef8071a76b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
47
2001 Micron Technology, Inc. All rights reserved.
128Mb: x16, x32 Mobile SDRAM
READs
Notes:
after tXSR has been met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted; that is, the current state
is for bank n and the commands shown are those allowed to be issued to bank m (assuming
that bank m is in such a state that the given command is allowable). Exceptions are covered
in the notes below.
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH, and LOAD MODE REGISTER commands may only be issued
when all banks are idle.
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank
represented by the current state only.
Table 11:
Truth Table – CURRENT STATE BANK n, COMMAND tO BANK m
Notes 1–6 apply to entire table; notes appear below and on next page
Current State
CS#
RAS#
CAS#
WE#
Command (Action)
Notes
Any
H
XXX
COMMAND INHIBIT (NOP/continue previous operation)
L
HHH
NO OPERATION (NOP/continue previous operation)
Idle
XXXX
Any command otherwise allowed to bank m
Row
Activating,
active, or
precharging
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE
Read
(auto
precharge
disabled)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start new READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE
Write
(auto
precharge
disabled)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start new WRITE burst)
LL
H
L
PRECHARGE
Read
(with auto
precharge)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start new READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE
Write
(with auto
precharge)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start new WRITE burst)
LL
H
L
PRECHARGE
Idle: The bank has been precharged, and tRP has been met.
Row active: A row in the bank has been activated, and tRCD has been met. No
data bursts/accesses and no register accesses are in progress.
Read: A READ burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Write: A WRITE burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Read w/auto
precharge enabled:
Starts with registration of a READ command with auto precharge
enabled and ends when tRP has been met. After tRP is met, the bank
will be in the idle state.
Write w/auto
precharge enabled:
Starts with registration of a WRITE command with auto precharge
enabled and ends when tRP has been met. After tRP is met, the bank
will be in the idle state.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MT48V8M16LFB4-8 ITG | 制造商:Micron Technology Inc 功能描述:DRAM Chip Mobile SDRAM 128M-Bit 8Mx16 2.5V 54-Pin VFBGA Tray |
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