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参数资料
| 型号： | MT48V8M16LFB4-75M:G |
| 元件分类： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54 |
| 封装： | 8 X 8 MM, LEAD FREE, VFBGA-54 |
| 文件页数： | 67/80页 |
| 文件大小： | 2775K |
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PDF: 09005aef807f4885/Source: 09005aef8071a76b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
7
2001 Micron Technology, Inc. All rights reserved.
128Mb: x16, x32 Mobile SDRAM
General Description
The 128Mb SDRAM device uses an internal pipelined architecture to achieve high-speed
operation. This architecture is compatible with the 2n rule of prefetch architectures, but
it also enables the column address to be changed on every clock cycle to achieve a high-
speed, fully random access. Precharging one bank while accessing one of the other three
banks will hide the precharge cycles and provide seamless high-speed, random-access
operation.
The 128Mb SDRAM device is designed to operate in 3.3V or 2.5V low-power memory
systems. The 2.5V version is compatible with 1.8V I/O interface. An auto refresh mode is
provided along with a power-saving, power-down mode. All inputs and outputs are
LVTTL-compatible.
SDRAMs offer substantial advances in DRAM operating performance, including the
ability to synchronously burst data at a high data rate with automatic column-address
generation, the ability to interleave between internal banks to hide precharge time, and
the capability to randomly change column addresses on each clock cycle during a burst
access.
Automotive Temperature
The automotive temperature (AT) option adheres to the following specifications:
16ms refresh rate
Self refresh not supported
Ambient and case temperature cannot be less than –40°C or greater than +105°C
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MT48V8M16LFB4-8 ITG | 制造商:Micron Technology Inc 功能描述:DRAM Chip Mobile SDRAM 128M-Bit 8Mx16 2.5V 54-Pin VFBGA Tray |
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