2 CPU
2-4
EPSON
S1C17602 TECHNICAL MANUAL
Type
Mnemonic
Function
Data transfer
ld.a
[%sp],%rs
General purpose register (32 bits, zero extension) Stack (*1)
Stack pointer post-increment/post-decrement
A pre-decrement function can be used
[%sp]+,%rs
[%sp]-,%rs
-[%sp],%rs
%sp,%rs
General purpose register (24 bits) SP
%sp,imm7
Immediate SP
Integer arithmetic add
%rd,%rs
Adds 16 bits between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
add/c
add/nc
add
%rd,imm7
Adds general purpose register and immediate 16 bits
add.a
%rd,%rs
Adds 24 bits between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
add.a/c
add.a/nc
add.a
%sp,%rs
Adds SP and general purpose register 24 bits
%rd,imm7
Adds general purpose register and immediate 24 bits
%sp,imm7
Adds SP and immediate 24 bits
adc
%rd,%rs
Adds 16 bits with carry between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
adc/c
adc/nc
adc
%rd,imm7
Adds general purpose register and immediate 16 bits with carry
sub
%rd,%rs
Subtracts 16 bits between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
sub/c
sub/nc
sub
%rd,imm7
Subtracts general purpose register and immediate 16 bits
sub.a
%rd,%rs
Subtracts 24 bits between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
sub.a/c
sub.a/nc
sub.a
%sp,%rs
Subtracts SP and general purpose register 24 bits
%rd,imm7
Subtracts general purpose register and immediate 24 bits
%sp,imm7
Subtracts SP and immediate 24 bits
sbc
%rd,%rs
Subtracts 16 bits with carry between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
sbc/c
sbc/nc
sbc
%rd,imm7
Subtracts general purpose register and immediate 16 bits with carry
cmp
%rd,%rs
Compares 16 bits between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
cmp/c
cmp/nc
cmp
%rd,sign7
Compares general purpose registers and immediate 16 bits
cmp.a
%rd,%rs
Compares 24 bits between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
cmp.a/c
cmp.a/nc
cmp.a
%rd,imm7
Compares general purpose registers and immediate 24 bits
cmc
%rd,%rs
Compares 16 bits with carry between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
cmc/c
cmc/nc
cmc
%rd,sign7
Compares general purpose register and immediate 16 bits with carry
Logic operations and
%rd,%rs
AND operation between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
and/c
and/nc
and
%rd,sign7
AND operation for general purpose register and immediate
or
%rd,%rs
OR operation between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
or/c
or/nc
or
%rd,sign7
OR operation for general purpose register and immediate
xor
%rd,%rs
EXCLUSIVE OR between general purpose registers
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
xor/c
xor/nc
xor
%rd,sign7
EXCLUSIVE OR for general purpose register and immediate
not
%rd,%rs
NOT operation between general purpose registers (1 complement)
Supports conditional execution (/c: Executed when C = 1, /nc: Executed when
C = 0)
not/c
not/nc
not
%rd,sign7
NOT operation for general purpose register and immediate (1 complement)