20 I2C Master (I2CM)
S1C17602 TECHNICAL MANUAL
EPSON
20-15
I2CM
0x4344: I2C Data Register (I2C_DAT)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
I2C Data
Register
(I2C_DAT)
0x4344
(16 bits)
D15–12
–
reserved
–
0 when being read.
D11
RBRDY
Receive buffer ready
1 Ready
0 Empty
0
R
D10
RXE
Receive execution
1 Receive
0 Ignored
0
R/W
D9
TXE
Transmit execution
1 Transmit
0 Ignored
0
R/W
D8
RTACK
Receive/transmit ACK
1 Error
0 ACK
0
R/W
D7–0
RTDT[7:0]
Receive/transmit data
RTDT7 = MSB
RTDT0 = LSB
0x0 to 0xff
0x0 R/W
D[15:12] Reserved
D11
RBRDY: Receive Buffer Ready Flag
Indicates the receive buffer status.
1 (R):
Receive data ready
0 (R):
Receive data empty (default)
The RBRDY flag is turned to 1 when data received by a shift register is loaded to RTDT[7:0] (D[7:0]),
and returned to 0 when the received data is read from RTDT[7:0]. An interrupt can be generated once
this flag is turned to 1.
Note: Use the RBUSY flag to wait for reception in the polling process. The RBRDY flag cannot
be used for the polling standby. Refer to the description related to data reception control.
D10
RXE: Receive Execution Bit
Receives 1 byte of data.
1 (R/W): Data receipt start
0 (R/W): Disabled (default)
Setting RXE to 1 and TXE (D9) to 0 starts receiving for 1 byte of data. RXE can be set to 1 for
subsequent receipt, even if the slave address is being sent or data is being received. RXE is reset to 0 as
soon as D6 is loaded to the shift register.
D9
TXE: Transmit Execution Bit
Transmits 1 byte of data.
1 (R/W): Data transmission start
0 (R/W): Disabled (default)
Transmission is started by setting the transmission data to RTDT[7:0] (D[7:0]) and writing 1 to TXE.
TXE can be set to 1 for subsequent transmission, even if the slave address or data is being sent. TXE is
reset to 0 as soon as the data set in RTDT[7:0] is transferred to the shift register.
D8
RTACK: Receive/Transmit ACK Bit
When transmitting data
Indicates the response bit status.
1 (R/W): Error (NACK)
0 (R/W): ACK (default)
RTACK becomes 0 when ACK is returned from the slave after 1 byte of data is sent, indicating that the
slave has received the data correctly. If RTACK is 1, the slave device is not operating or the data was
not received correctly.
When receiving data
Sets the response bit sent to the slave.
1 (R/W): Error (NACK)
0 (R/W): ACK (default)
To return an ACK after data has been received, RTACK should be set to 0 before the I2C master module
sends the response bit.
To return an NACK, set RTACK to 1.