10 Input/Output Port (P)
S1C17602 TECHNICAL MANUAL
EPSON
10-3
IOPort
10.3 Data Input/Output
The input/output ports permit selection of the data input/output direction for each bit using PxOEN[7:0]
(Px_OEN register) and PxIEN[7:0] (Px_IEN register). PxOEN[7:0] executes on/off control of data output, while
PxIEN[7:0] executes on/off control of data input.
P0OEN[7:0]: P0[7:0] Port Output Enable Bits in the P0 Port Output Enable (P0_OEM) Register (D[7:0]/0x5202)
P1OEN[7:0]: P1[7:0] Port Output Enable Bits in the P1 Port Output Enable (P1_OEM) Register (D[7:0]/0x5212)
P2OEN[7:0]: P2[7:0] Port Output Enable Bits in the P2 Port Output Enable (P2_OEM) Register (D[7:0]/0x5222)
P3OEN[7:0]: P3[7:0] Port Output Enable Bits in the P3 Port Output Enable (P3_OEM) Register (D[7:0]/0x5232)
P4OEN[3:0]: P4[3:0] Port Output Enable Bits in the P4 Port Output Enable (P4_OEM) Register (D[3:0]/0x5242)
P0IEN[7:0]: P0[7:0] Port Input Enable Bits in the P0 Port Input Enable (P0_IEN) Register (D[7:0]/0x520a)
P1IEN[7:0]: P1[7:0] Port Input Enable Bits in the P1 Port Input Enable (P1_IEN) Register (D[7:0]/0x521a)
P2IEN[7:0]: P2[7:0] Port Input Enable Bits in the P2 Port Input Enable (P2_IEN) Register (D[7:0]/0x522a)
P3IEN[7:0]: P3[7:0] Port Input Enable Bits in the P3 Port Input Enable (P3_IEN) Register (D[7:0]/0x523a)
P4IEN[3:0]: P4[3:0] Port Input Enable Bits in the P4 Port Input Enable (P4_IEN) Register (D[3:0]/0x524a)
Table 10.3.1: Data Input/Output list
PxOEN[7:0]
Output control
PxIEN[7:0]
Input control
PxPU[7:0]
Pull-up control
Port status
0
1
0
Functions as input port (with pull-up off).
Port pin (external input signal) value can be read from
PxIN[7:0] (input data). Output is disabled.
0
1
Functions as input port (with pull-up on). (Default) port pin
(external input signal) value can be read from PxIN[7:0] (input
data). Output is disabled.
1
0
1 or 0
Functions as output port (with pull-up off).
Input is disabled, and the value read from PxIN[7:0] (input
data) is 0.
1
1 or 0
Functions as output port (with pull-up off).
Input is also enabled, and the port pin value (output value)
can be read from PxIN[7:0] (input data).
0
The pin is in high impedance state (with pull-up off). Output is
disabled, and the value read from PxIN[7:0] (input data) is 0.
0
1
The pin is in high impedance state (with pull-up on). Output is
disabled, and the value read from PxIN[7:0] (input data) is 0.
The input/output direction for the port selecting the peripheral module function is controlled by the peripheral
module. The PxIO[7:0] setting is ignored.
Data input
When set to input mode, PxIO[7:0] is set to 0 (default). The input/output port set to input mode switches to
high-impedance state, and functions as the input port. If pull-up is enabled by the Px_PU register, the port will
be pulled up.
In input mode, the input pin state can be read out directly from PxIN[7:0] (Px_IN register). The value read will
be 1 when the input pin is at High (HVDD) level and 0 when it is at Low (VSS) level.
P0IN[7:0]: P0[7:0] Port Input Data Bits in the P0 Port Input Data (P0_IN) Register (D[7:0]/0x5200)
P1IN[7:0]: P1[7:0] Port Input Data Bits in the P1 Port Input Data (P1_IN) Register (D[7:0]/0x5210)
P2IN[7:0]: P2[7:0] Port Input Data Bits in the P2 Port Input Data (P2_IN) Register (D[7:0]/0x5220)
P3IN[7:0]: P3[7:0] Port Input Data Bits in the P3 Port Input Data (P3_IN) Register (D[7:0]/0x5230)
P4IN[3:0]: P4[7:0] Port Input Data Bits in the P4 Port Input Data (P4_IN) Register (D[3:0]/0x5240)