7 Oscillator Circuit (OSC)
S1C17602 TECHNICAL MANUAL
EPSON
7-3
OSC
7.3 OSC3 Oscillator Circuit
OSC3 is a high-precision, high-speed oscillator circuit using crystal or ceramic oscillator. It can be used with the
IOSC oscillator circuit by switching between them.
Figure 7.3.1 illustrates the OSC3 oscillator circuit configuration.
VSS
OSC4
OSC3
Rf
CD3
CG3
X'tal3
or
Ceramic
fOSC3
SLEEP status
Oscillator circuit control signal
Figure 7.3.1: OSC3 oscillator circuit
A crystal oscillator (X’tal3) or ceramic oscillator (Ceramic) and feedback resistor (Rf) should be connected between
the OSC3 and OSC4 pins. Additionally, two capacitors (CG3 and CD3) should be connected between the OSC3/
OSC4 pins and VSS.
OSC3 oscillation on/off
The OSC3 oscillator circuit stops oscillating if OSC3EN (D0/OSC_CTL register) is set to 0 and starts
oscillating if set to 1. The OSC3 oscillator circuit stops oscillating even in SLEEP mode.
OSC3EN: OSC3 Enable Bit in the Oscillation Control (OSC_CTL) Register (D0/0x5061)
After the initial resetting, OSC3EN is set to 0 and the OSC3 oscillator circuit is halted. The IOSC clock is used
as the default high-speed clock. To use the OSC3 clock, the clock must also be switched, in addition to the on/
off controls described above. For specific information on switching, see “7.5 Clock Switching.”
Stabilization wait time at start of OSC3 oscillation
When using the OSC3 clock, the OSC3 oscillator circuit incorporates an oscillation stabilization wait timer to
prevent malfunctions due to unstable clock operations at the start of OSC3 oscillation—e.g., when waking from
SLEEP, or when the OSC3 oscillation circuit is switched on via software. The OSC3 clock is not fed to the
system until the time set for this timer has elapsed.
Use the OSC3WT[1:0] (D[5:4]/OSC_CTL register) to select among four different oscillation stabilization wait
times.
OSC3WT[1:0]: OSC3 Wait Cycle Select Bits in the Oscillation Control (OSC_CTL) Register (D[5:4]/0x5061)
Table 7.3.1: OSC3 oscillation stabilization wait time settings
OSC3WT[1:0]
Oscillation stabilization wait time
0x3
128 cycles
0x2
256 cycles
0x1
512 cycles
0x0
1,024 cycles
(Default: 0x0)
This is set to 1,024 cycles (OSC3 clock) after initial resetting.
Note: The stability of oscillation depends on the oscillator and external add-on components. Full
evaluation is required for configuring shorter stabilization wait time.
OSC3 clock system supply wait time =< OSC3 oscillation start time (max.) + OSC3 oscillation
stabilization wait time.
External clock input of OSC3
The clock can be input to the OSC3 pin from external. To stop the external clock, stop it at the VSS level. For
information about input clock waveforms, refer to “29 Electrical Characteristics.”
Pin settings when OSC3 is not used
Keep the OSC3 and OSC4 pins open.
Note: Set OSC3EN (the D0/OSC_CTL register) to 0 while the OSC3 and OSC4 pins are kept open.