2 CPU
S1C17602 TECHNICAL MANUAL
EPSON
2-5
CPU
Type
Mnemonic
Function
Shift & swap
sr
%rd,%rs
Right logic shift (shift bit number specified by register)
%rd,imm7
Right logic shift (shift bit number specified by immediate)
sa
%rd,%rs
Right operation shift (shift bit number specified by register)
%rd,imm7
Right operation shift (shift bit number specified by immediate)
sl
%rd,%rs
Left logic shift (shift bit number specified by register)
%rd,imm7
Left logic shift (shift bit number specified by immediate)
swap
%rd,%rs
Byte swap at 16-bit boundary
Immediate extension ext
imm13
Extend operand for next instruction
Conversion
cv.ab
%rd,%rs
Convert 8-bit coded data to 24 bits
cv.as
%rd,%rs
Convert 16-bit coded data to 24 bits
cv.al
%rd,%rs
Convert 32-bit data to 24 bits
cv.la
%rd,%rs
Convert 24-bit data to 32 bits
cv.ls
%rd,%rs
Convert 16-bit data to 32 bits
Branch
jpr
jpr.d
sign10
PC-relative jump
Allows delayed branching
%rb
jpa
ipa.d
imm7
Absolute jump
Allows delayed branching
%rb
jrgt
jrgt.d
sign7
Conditional PC-relative jump
Branch conditions: !Z & !(N ^ V)
Allows delayed branching
jrge
jrge.d
sign7
Conditional PC-relative jump
Branch conditions: !(N ^ V)
Allows delayed branching
jrlt
jrlt.d
sign7
Conditional PC-relative jump
Branch conditions: N ^ V
Allows delayed branching
jrle
jrle.d
sign7
Conditional PC-relative jump
Branch conditions: Z | N ^ V
Allows delayed branching
jrugt
jrugt.d
sign7
Conditional PC-relative jump
Branch conditions: !Z & !C
Allows delayed branching
jruge
jruge.d
sign7
Conditional PC-relative jump
Branch conditions: !C
Allows delayed branching
jrult
jrult.d
sign7
Conditional PC-relative jump
Branch conditions: C
Allows delayed branching
jrule
jrule.d
sign7
Conditional PC-relative jump
Branch conditions: Z | C
Allows delayed branching
jreq
jreq.d
sign7
Conditional PC-relative jump
Branch conditions: Z
Allows delayed branching
jrne
jrne.d
sign7
Conditional PC-relative jump
Branch conditions: !Z
Allows delayed branching
call
call.d
sign10
PC-relative subroutine call
Allows delayed branching
%rb
calla
calla.d
imm7
Absolute subroutine call
Allows delayed branching
%rb
ret
ret.d
Return from subroutine
Allows delayed branching
int
imm5
Software interrupt
intl
imm5,imm3
Software interrupt with interrupt level specification
reti
reti.d
Return from interrupt
Allows delayed branching
brk
Debug interrupt
retd
Return from debug processing
System control
nop
No operation
halt
HALT
slp
SLEEP
ei
Permits interrupt
di
Prevents interrupt
Coprocessor
control
ld.cw
%rd,%rs
Transfer data to coprocessor
%rd,imm7
ld.ca
%rd,%rs
Transfer data to coprocessor and obtain results and flag status
%rd,imm7
ld.cf
%rd,%rs
Transfer data to coprocessor and obtain flag status
%rd,imm7
1 Instruction ld.a accesses 32-bit memory. When data is transferred from register to memory, 32 bits of data with
the first 8 bits set to 0 are written to memory. When data is read from memory, the first 8 bits are ignored.