24 A/D Converter (ADC10SA)
24-4
EPSON
S1C17602 TECHNICAL MANUAL
Selection of the start/end channels for analog conversion process
The channels used for the A/D conversion should be selected from pins (channels) configured for analog input.
This setting enables single converting operation to process the serial A/D conversion over multiple channels.
Use ADCS[2:0] (D[10:8]/ADC10_TRG register) and ADCE[2:0] (D[13:11]/ADC10_TRG register) to specify
the start and end channel respectively for conversion process.
ADCS[2:0]: A/D Converter Start Channel Selection Bits in the ADC10 Trigger/Channel Select (ADC10_TRG)
Register (D[10:8]/0x5382)
ADCE[2:0]: A/D Converter End Channel Selection Bits in the ADC10 Trigger/Channel Select (ADC10_TRG)
Register (D[13:11]/0x5382)
Table 24.3.2: Relation between ADCS/ADCE and input channels.
ADCS[2:0]/ADCE[2:0]
Select channel
0x7
AIN7
0x6
AIN6
0x5
AIN5
0x4
AIN4
0x3
AIN3
0x2
AIN2
0x1
AIN1
0x0
AIN0
(Default: 0x0)
Example: A/D conversion process of single operation
ADCS[2:0] = 0, ADCE[2:0] = 0: Convert only AIN0.
ADCS[2:0] = 0, ADCE[2:0] = 3: Convert serially in the order of AIN0 AIN1 AIN2
→AIN3
ADCS[2:0] = 2, ADCE[2:0] = 1: Convert serially in the order of AIN2
→AIN3→AIN4→AIN5→AIN6
→AIN7→AIN0→AIN1
Setting of A/D conversion mode
Single conversion or serial conversion can be selected for the A/D converter by using ADMS (D5/ADC10_TRG
register).
ADMS: A/D Conversion Mode Selection Bit in the ADC10 Trigger/Channel Select (ADC10_TRG) Register
(D6/0x5382)
1. Single conversion mode (ADMS=0)
This mode performs a single A/D conversion of all inputs to channels in the range specified by ADCS[2:0]
(D[10:8]/ADC10_TRG register) and ADCE[2:0] (D[13:11]/ADC10_TRG register), and then stops.
2. Serial conversion mode (ADMS=1)
This mode keeps performing A/D conversion of channels in the range specified by ADCS[2:0] or
ADCE[2:0] until software stops the process.
The mode is set to single conversion after the initial reset.
Selection of the trigger type
Select the type of trigger starting A/D conversion from 3 types shown in the table 24.3.2 and specify it by
ADTS[1:0] (D[5:4]/ADC10_TRG register).
ADTS[1:0]: A/D Conversion Trigger Selection Bits in the ADC10 Trigger/Channel Select (ADC10_TRG)
Register (D[5:4]/0x5382)
Table 24.3.3: Selection of the trigger type
ADTS[1:0]
Trigger source
0x3
External trigger (#ADTRG pin)
0x2
reserved
0x1
16-bit programmable timer Ch.0
0x0
Software trigger
(Default: 0x0)