24 A/D Converter (ADC10SA)
S1C17602 TECHNICAL MANUAL
EPSON
24-15
ADC10SA
0x5384: ADC10 Control/Status Register (ADC10_CTL)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
A/D Control/
Status Register
(ADC10_CTL)
0x5384
(16 bits)
D15
–
reserved
–
0 when being read.
D14–12
ADICH
Internal conversion channel status
0x0–0x7
0
R
D11
–
reserved
–
0 when being read.
D10
ADIBS
Internal busy status
1
busy
0
idle
0
R
D9
ADOWE
Overwrite error flag
1
Error
0
Normal
0
R/W Reset by writing 1
D8
ADCR
Conversion-complete flag
1 Completed 0
Not
conmpleted
0
R
Reset when ADADD
is read.
D7–6
–
reserved
–
0 when being read.
D5
ADOIE
Overwrite interrupt enable
1
Enable
0
Disable
0
R/W
D4
ADCIE
Conversion-complete interrupt
enable
1
Enable
0
Disable
0
R/W
D3–2
–
reserved
–
0 when being read.
D1
ADCTL
conversion control
1 Start/Run 0
Stop
0
R/W Stop by writing 0
D0
ADEN
A/D enable
1
Enable
0
Disable
0
R/W
D15
Reserved
D[14:12] ADICH [2:0]: Internal Conversion Channel Status Bits
Shows the channel numbers (0–7) during A/D conversion.
When multi channels make A/D conversion, channels currently under conversion can be confirmed by
reading this bit.
ADICH is set to 0 (AIN0) at the time of initial reset.
D11
Reserved
D10
ADIBS: Internal Busy status Bits
Shows the status of A/D converter.
1 (R/W) : during conversion
0 (R/W) : Conversion complete
1 is output during A/D conversion and 0 is output after A/D conversion completion.
D9
ADOWE: Overwrite Error Flag Bit
This is an interruption flag indicating the status of conversion data overwrite cause
1 (R) : With Interruption cause
0 (R) : Without interruption cause (default)
1 (W) : Reset the flag
0 (W) : Disable
When multi channels make A/D conversion, ADOWE set to 1 if conversion result of next channel
is written (overwritten) to conversion data register before resetting the conversion end flag ADCF
set by conversion of previous channel by reading conversion data. At that time, if the ADOIE (D5/
ADC10_CTL register) is set to 1, overwrite interruption request signal related for ITC is output. If
interruption conditions of ITC and S1C17 core are valid, interruption will be occurred.
ADOWE is reset by writing 1.
Note: After generating overwrite interruption, it is necessary to reset the ADOWE in interruption
process routine to prevent the regeneration of same interruption.
Before permitting overwrite interruption by ADOIE, reset the ADOWE to prevent the
generation of unnecessary interruption.
D8
ADCF: Conversion Complete Flag Bit
It is an interruption flag indicating condition for generating conversion completion cause.
1 (R) : With interruption cause
0 (R) : Without interruption cause (default)
1 (W) : Disable