21. Multi-Function Timer Pulse Unit 2 (MTU2A)
(j)
Method for Generating PWM Output in Complementary PWM Mode
In complementary PWM mode, three phases of PWM waveforms are output with a non-overlap time between the
positive and negative phases. This non-overlap time is called the dead time.
A PWM waveform is generated by output of the level selected in the timer output control register in the event of a
compare match between a counter and a data register. While TCNTS is counting, the data register and temporary register
values are simultaneously compared to create consecutive PWM pulses from 0 to 100%. The relative timing of turn-on
and turn-off compare match occurrence may vary, but the compare match that turns off each phase takes precedence to
secure the dead time and ensure that the positive-phase and negative-phase turn-on times do not overlap.
Figure 21.46to
Figure 21.48 show examples of waveform generation in complementary PWM mode.
The positive-phase and negative-phase turn-off timing is generated by a compare match with the counter value indicated
in solid lines in the figure, and the turn-on timing by a compare match with the counter indicated in dotted lines, which
operates with a delay of the dead time behind the solid-line counter. In the T1 period, compare match a that turns off the
negative phase has the highest priority, and compare matches before a are ignored. In the T2 period, compare match c
that turns off the positive phase has the highest priority, and compare matches before c are ignored.
In most cases, compare matches occur in the order a
If compare matches deviate from the a
b c d order, since the time for which the negative phase is off is shorter
than twice the dead time, the positive phase is not turned on. If compare matches deviate from the c
d a' b' order,
since the time for which the positive phase is off is shorter than twice the dead time, the negative phase is not turned on.
As shown in
Figure 21.47, if compare match c follows compare match a before compare match b, compare match b is
ignored and the negative phase is turned off by compare match d. This is because turning off the positive phase has
higher priority due to the occurrence of compare match c (positive-phase off timing) before compare match b (positive-
phase on timing) (consequently, the waveform does not change because the positive phase goes from off to off).
Similarly, in the example in
Figure 21.48, compare match a' with new data in the temporary register occurs before
compare match c, but until compare match c, which turns off the positive phase, other compare matches are ignored. As
a result, the negative phase is not turned on.
Thus, in complementary PWM mode, compare matches at turn-off timings take precedence, and turn-on timing compare
matches that occur before a turn-off timing compare match are ignored.
Figure 21.46
Example of Waveform Output in Complementary PWM Mode (1)
T1 period
ab
c
a'
b'
d
T2 period
T1 period
MTU3.TGRA
TCDR
TDDR
0000h
Positive phase output
Negative phase output