11. Low Power Consumption
11.2.6
Sleep Mode Return Clock Source Switching Register (RSTCKCR)
RSTCKCR is used to control clock source switching at cancellation of sleep mode.
When operation is restored from sleep mode by setting RSTCKCR, the main clock oscillator stop bit in the main clock
oscillator control register (MOSCCR.MOSTP) and HOCO stop bit in the high-speed clock oscillator control register
(HOCOCR.HCSTP) corresponding to the clock source to be used on restoration are automatically modified to the
operating state. However, the power of HOCO is not automatically switched on. The value of RSTCKSEL[2:0] bits is
automatically reloaded to the clock source select bits in the system clock control register 3 (SCKCR3.CKSEL[2:0]).
When the setting of register RSTCKCR is for the HOCO to be used in recovery from sleep mode, the power supply for
the HOCO is not automatically switched on. If the HOCO to be used in recovery from sleep mode, the power supply for
the HOCO must be on when the transition to sleep mode takes place.
When returning from sleep mode, the OPCCR.OPCM[2:0] bits are automatically switched to middle-speed mode A
(010b) or high-speed mode (000b) according to the SCKCR register setting and RSTCKSEL[2:0] bit setting.
When the RSTCKSEL[2:0] bits are set to 001b (HOCO selected) and the sleep mode return clock source switching
function is enabled, the FCK, ICK, BCK, PCKD, and PCKB bits in SCKCR should be set to divided-by-2 or more before
a transition is made to sleep mode.
The sleep mode return clock source switching function and clock source switching function by the ELC cannot be used at
the same time.
To enable the sleep mode return clock source switching function, the RSTCKEN bit should be set to 1 with the ELC
clock source switching function disabled. The ELC clock source switching function should be enabled with the
RSTCKEN bit being 0.
RSTCKSEL[2:0] Bits (Sleep Mode Return Clock Source Select)
The RSTCKSEL[2:0] bits select the clock source to be used when sleep mode is canceled.
The clock source selected by the RSTCKSEL[2:0] bits is enabled only when the RSTCKEN bit is 1.
RSTCKEN Bit (Sleep Mode Return Clock Source Switching Enable)
The RSTCKEN bit enables or disables clock source switching when sleep mode is canceled.
When sleep mode is canceled, the clock source should be switched only when LOCO or sub clock is selected as a clock
for a transition to sleep mode. To make a transition to sleep mode with HOCO, main clock, or PLL selected as the clock
source, the RSTCKEN bit should not be set to 1.
Address(es): 0008 00A1h
b7
b6
b5
b4
b3
b2
b1
b0
RSTCK
EN
————
RSTCKSEL[2:0]
Value after reset:
00000
000
Bit
Symbol
Bit Name
Description
R/W
b2 to b0
Sleep Mode Return Clock
Source Select
b2
b0
0 0 1: HOCO is selected
0 1 0: Main clock oscillator is selected
Settings other than above are prohibited while the RSTCKEN bit is 1.
R/W
b6 to b3
—
Reserved
These bits are read as 0. The write value should be 0.
R/W
b7
Sleep Mode Return Clock
Source Switching Enable
0: Clock source switching at sleep mode cancellation is disabled
1: Clock source switching at sleep mode cancellation is enabled
R/W