29. I2C Bus Interface (RIIC)
29.13 Interrupt Request
The RIIC issues four types of interrupt request: transfer error or event generation (arbitration-lost, NACK detection,
timeout detection, start condition detection, and stop condition detection), receive data full, transmit data empty, and
transmit end.
Table 29.7 lists details of the several interrupt requests. The receive data full and transmit data empty are both capable of
launching data transfer by the DTC or DMAC.
Clear or mask the each flag during interrupt handling.
Notes on interrupt processing:
1. There is a latency (delay) between the execution of a write instruction for a peripheral module by the CPU and
actual writing to the module. Thus, when an interrupt flag has been cleared or masked, read the relevant flag again
to check whether clearing or masking has been completed, and then return from interrupt processing. Returning
from interrupt processing without checking that writing to the module has been completed creates a possibility of
repeated processing of the same interrupt.
2. Since ICTXI is an edge-detected interrupted, it does not require clearing. Furthermore, the TDRE flag in ICSR2 (a
condition for ICTXI) is automatically cleared to 0 when data for transmission are written to ICDRT or a stop
condition is detected (STOP flag = 1 in ICSR2).
3. Since ICRXI is an edge-detected interrupted, it does not require clearing. Furthermore, the RDRF flag in ICSR2 (a
condition for ICRXI) is automatically cleared to 0 when data are read from ICDRR.
4. When using the ICTEI interrupt, clear the TEND flag in ICSR2 in the ICTEI interrupt processing.
Note that the TEND flag in ICSR2 is automatically cleared to 0 when data for transmission are written to ICDRT or
a stop condition is detected (STOP flag = 1 in ICSR2).
29.13.1
Buffer Operation for ICTXI and ICRXI Interrupts
For the ICTXI and ICRXI interrupts, as well as the ICU.IRn.IR flag having the value 1 being a condition for issuing the
interrupts, the interrupt request is retained within and not output by the ICU (the capacity for internally retaining the
interrupts is one request per source).
An interrupt request that was being retained within the ICU is output when the value of the ICU.IRn.IR flag becomes 0.
Internally retained interrupt requests are automatically cleared under normal conditions of usage.
Internally retained interrupt requests can also be cleared by writing 0 to the interrupt enable bit within the given
peripheral module.
Table 29.7
Interrupt Sources
Symbol
Interrupt Source Interrupt Flag
DTC
Launching
DMACA
Launching
Priority
Interrupt Condition
ICEEI
Transfer Error/
Event Generation
AL
Not possible
High
AL=1 ALIE=1
NACKF
NACKF=1 NAKIE=1
TMOF
TMOF=1 TMOIE=1
START
START=1 STIE=1
STOP
STOP=1 SPIE=1
ICRXI
Receive Data Full —
Possible
RDRF=1 RIE=1
ICTXI
Transmit Data
Empty
—
Possible
TDRE=1 TIE=1
ICTEI
Transmit End
TEND
Not possible
Low
TEND=1 TEIE=1