29. I2C Bus Interface (RIIC)
29.2.9
I2C Bus Status Register 1 (ICSR1)
Note 1. Only 0 can be written to clear the flag.
ICSR1 indicates various address detection statuses.
Address(es): RIIC0.ICSR1 0008 8308h
b7
b6
b5
b4
b3
b2
b1
b0
HOA
—
DID
—
GCA
AAS2
AAS1
AAS0
Value after reset:
00000
000
Bit
Symbol
Bit Name
Description
R/W
b0
Slave Address 0 Detection Flag
0: Slave address 0 is not detected.
1: Slave address 0 is detected.
This bit is set to 1 when the received slave address matches
the SVA[6:0] value in SARL0 while the FS bit in SARU0 is 0 (7-
bit address format selected).
This bit is set to 1 when the received slave address matches a
value of (11110b + SVA[1:0] in SARU0) and the following
address matches the SARL0 value while the FS bit in SARU0 is
1 (10-bit address format selected).
(This bit is set at the rising edge of the ninth SCL clock cycle in
the SARL0 match determination frame.)
R(/W)
b1
Slave Address 1 Detection Flag
0: Slave address 1 is not detected.
1: Slave address 1 is detected.
This bit is set to 1 when the received slave address matches
the SVA[6:0] value in SARL1 while the FS bit in SARU1 is 0 (7-
bit address format selected).
This bit is set to 1 when the received slave address matches a
value of (11110b + SVA[1:0] in SARU1) and the following
address matches the SARL1 value while the FS bit in SARU1 is
1 (10-bit address format selected).
(This bit is set at the rising edge of the ninth SCL clock cycle in
the SARL1 match determination frame.)
R(/W)
b2
Slave Address 2 Detection Flag
0: Slave address 2 is not detected.
1: Slave address 2 is detected.
This bit is set to 1 when the received slave address matches
the SVA[6:0] value in SARL2 while the FS bit in SARU2 is 0 (7-
bit address format selected).
This bit is set to 1 when the received slave address matches a
value of (11110b + SVA[1:0] in SARU2) and the following
address matches the SARL2 value while the FS bit in SARU2 is
1 (10-bit address format selected).
(This bit is set at the rising edge of the ninth SCL clock cycle in
the SARL2 match determination frame.)
R(/W)
b3
General Call Address Detection
Flag
0: General call address is not detected.
1: General call address is detected.
This bit is set to 1 when the received slave address matches
the general call address (all 0).
R(/W)
b4
—
Reserved
This bit is read as 0. The write value should be 0.
R/W
b5
Device-ID Address Detection Flag
0: Device-ID command is not detected.
1: Device-ID command is detected.
This bit is set to 1 when the first frame received immediately
after a start condition is detected matches a value of (device ID
(1111 100b) + 0[W]).
R(/W)
b6
—
Reserved
This bit is read as 0. The write value should be 0.
R/W
b7
Host Address Detection Flag
0: Host address is not detected.
1: Host address is detected.
This bit is set to 1 when the received slave address matches
the host address (0001 000b).
R(/W)