40. E2 DataFlash Memory (Flash Memory for Data Storage)
40.7.2
Error Protection
Error protection is the detection of errors in the issuing of FCU commands and of prohibited access, and response in the
form of notification of the FCU malfunction and prohibition of the reception of further commands by the FCU (the FCU
enters the command-locked state). When the FCU enters the command-locked state (FASTAT.CMDLK bit is 1), one or
several of the status bits (FSTATR0.ILGLERR, ERSERR, and PRGERR bits, FSTATR1.FCUERR bit, and
FASTAT.DFLAE, DFLRPE, and DFLWPE bits) are set to 1 and programming and erasure of the E2 DataFlash are
prohibited. To release the FCU from the command-locked state, a status register clearing command must be issued with
FASTAT set to 10h.
While the CMDLKIE bit in FAEINT is 1, a flash interface error (FIFERR) interrupt will be generated if the FCU enters
the command-locked state (the CMDLK bit in FASTAT becomes 1). While an E2 DataFlash-related interrupt enable bit
(DFLAEIE, DFLRPEIE, or DFLWPEIE) in FAEINT is 1, an FIFERR interrupt will also be generated if the
corresponding status bit (DFLAE, DFLRPE, or DFLWPE) in FASTAT becomes 1.
Table 40.8 shows the error protection types for the E2 DataFlash and the values of the status bits (the ILGLERR,
ERSERR, and PRGERR bits in FSTATR0 and the DFLAE, DFLRPE, and DFLWPE bits in FASTST) after the detection
of each type of error. For the error protection types used in common by the ROM and E2 DataFlash (FENTRYR setting
error, most illegal command errors, erasing errors, programming errors, and FCU errors, see
section 39.8.2, ErrorIf the FCU enters the command-locked state due to a command other than a suspension command issued during
programming or erasure processing, the FCU continues programming or erasing the E2 DataFlash. In this state, the P/E
suspension command cannot suspend programming or erasure. If a command is issued in the command-locked state, the
ILGLERR bit becomes 1.
Table 40.8
Error Protection Types (for E2 DataFlash Only)
Error
Description
IL
GL
ERR
ERSERR
PRGERR
DF
LAE
DF
LRPE
DF
LWPE
Illegal command error
The value specified in the second cycle of a programming command was
other than 04h and 40h.
10
00
A lock bit programming command was issued for an area in the E2
DataFlash while the FENTRYD bit of FENTRYR register was set to 1.
10
00
E2 DataFlash access error
A read access command was issued for the E2 DataFlash area while
FENTRYD = 1 in FENTRYR in E2 DataFlash P/E normal mode.
10
01
00
A write access command was issued for the E2 DataFlash area while
FENTRYD = 0.
10
01
00
An access command was issued for the E2 DataFlash area while the
FENTRY0 bit in FENTRYR was 1.
10
01
00
E2 DataFlash read protect
error
A read access command was issued for the E2 DataFlash area while it was
protected against reading by the DFLRE0 setting.
10
00
10
E2 DataFlash
programming protect error
A program/block erase command was issued for the E2 DataFlash area
while it was protected against programming and erasure by the DFLWE0
setting.
10
00
01