39. ROM (Flash Memory for Code Storage)
39.13 Usage Notes
(1) Areas where Programming or Erasure is Suspended
Data in areas where programming or erasure is suspended are undefined. To avoid malfunctions due to the reading of
undefined data, prevent the reading of data and execution of code from areas where programming or erasure is currently
suspended.
(2) Suspending Programming or Erasure
If you use the programming/erasure suspension command to suspend the processing of programming or erasure, be sure
to use the resume command so that the processing is completed. Do not issue a programming/erasure command again
within 20
s (when FCLK is 25 MHz) after issuing the resume command.
(3) Prohibition of Reprogramming
Two or more programming operations cannot be performed for the same address range. If an address range that has
already been programmed is to be programmed again, be sure to erase the area in advance of the programming.
(4)
Reset during Programming or Erasure
Do not allow generation of a reset (the RES# pin reset, LVD0 to LVD2 resets, independent watchdog timer reset,
watchdog timer reset, or software reset) during programming or erasure, since doing so can damage the flash memory. If
the RES# pin reset is unavoidably input, release the reset after the reset input period of tRESWF or more (see section 41,
Electrical Characteristics) has elapsed.
When the FCU is reset by the FRESETR.FRESET bit during programming/erasure or when an internal reset is
performed due to watchdog timer overflow, make sure that the reset state is maintained for the period of tFCUR (see
(5) Prohibition of Non-Maskable Interrupts during Programming or Erasure
If a non-maskable interrupt (the NMI pin, LVD1, LVD2, oscillation stop detection, independent watchdog timer, or
watchdog timer interrupt) occurs during programming or erasure, the vector is fetched from the ROM, which causes
undefined data to be read out. Therefore, avoid a non-maskable interrupt being generated during programming or erasing
in the ROM.
(6) Interrupt Vector Assignment During Programming or Erasure
The generation of interrupts during programming or erasure may lead to the fetching of vectors from the ROM. To
prevent access to the ROM area due to the generation of interrupts, set the interrupt table register (INTB) of the CPU so
that the destination for the fetching of interrupt vector is an area outside the ROM.
(7) Programming/Erasure in Low-Speed Operating Modes 1 and 2
Do not program or erase the flash memory when low-speed operating mode 1 or 2 is selected with the operating power
control register (OPCCR).
(8) Programming/Erasure Abnormal End
After programming/erasure is not successfully completed due to a reset, a reset through the FRESETR.FRESET bit, or a
command-locked state caused by error detection during programming/erasure, the lock bit may be 0 (protected state). In
this case, erase the lock bit by issuing the block erase command with the FPROTR.FPROTCN bit set to 1.