参数资料
型号: W631GG6KB-12
厂商: Winbond Electronics
文件页数: 23/159页
文件大小: 0K
描述: IC DDR3 SDRAM 1GBIT 96WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR3 SDRAM
存储容量: 1G(64M x 16)
速度: 800MHz
接口: 并联
电源电压: 1.425 V ~ 1.575 V
工作温度: 0°C ~ 85°C
封装/外壳: 96-TFBGA
供应商设备封装: 96-WBGA(9x13)
包装: 托盘
W631GG6KB
8.3.3.1
Partial Array Self Refresh (PASR)
If PASR (Partial Array Self Refresh) is enabled, data located in areas of the array beyond the specified
address range shown in Figure 7 will be lost if Self Refresh is entered. Data integrity will be
maintained if t REFI conditions are met and no Self Refresh command is issued.
8.3.3.2
CAS Write Latency (CWL)
The CAS Write Latency is defined by MR2 (bits A3-A5), as shown in Figure 7. CAS Write Latency is
the delay, in clock cycles, between the internal Write command and the availability of the first bit of
input data.
DDR3 SDRAM does not support any half-clock latencies. The overall Write Latency (WL) is defined as
Additive Latency (AL) + CAS Write Latency (CWL); WL = AL + CWL. For more information on the
supported CWL and AL settings based on the operating clock frequency, refer to section 10.15
“ Speed Bins ” on page 134. For detailed Write operation refer to section 8.14 “ WRITE Operation ” on
page 56.
8.3.3.3
Auto Self Refresh (ASR) and Self Refresh Temperature (SRT)
DDR3 SDRAM must support Self Refresh operation at all supported temperatures. Applications
requiring Self Refresh operation in the Extended Temperature Range must use the ASR function or
program the SRT bit appropriately.
When ASR enabled, DDR3 SDRAM automatically provides Self Refresh power management functions
for all supported operating temperature values. If not enabled, the SRT bit must be programmed to
indicate T OPER during subsequent Self Refresh operation.
ASR = 0, Self Refresh rate is determined by SRT bit A7 in MR2.
ASR = 1, Self Refresh rate is determined by on-die thermal sensor. SRT bit A7 in MR2 is don't care.
8.3.3.4
Dynamic ODT (Rtt_WR)
DDR3 SDRAM introduces a new feature “ Dynamic ODT ” . In certain application cases and to further
enhance signal integrity on the data bus, it is desirable that the termination strength of the DDR3
SDRAM can be changed without issuing an MRS command. MR2 Register locations A9 and A10
configure the Dynamic ODT settings. In Write leveling mode, only Rtt_Nom is available. For details on
Dynamic ODT operation, refer to section 8.19.3 “ Dynamic ODT ” on page 83.
Publication Release Date: Dec. 09, 2013
Revision A05
- 23 -
相关PDF资料
PDF描述
AMC20DRAS-S734 CONN EDGECARD 40POS .100 R/A PCB
FMC12DREI-S13 CONN EDGECARD 24POS .100 EXTEND
EPF6024AQC240-2N IC FLEX 6000 FPGA 24K 240-PQFP
EPF6024AQC240-2 IC FLEX 6000 FPGA 24K 240-PQFP
EPF10K10QC208-3 IC FLEX 10K FPGA 10K 208-PQFP
相关代理商/技术参数
参数描述
W631GG6KB-15 功能描述:IC DDR3 SDRAM 1GBIT 96WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:2,500 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?(单线) 电源电压:1.8 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP,8-MSOP(0.118",3.00mm 宽) 供应商设备封装:8-MSOP 包装:带卷 (TR)
W631GG8KB-11 制造商:Winbond Electronics Corp 功能描述:IC DDR3 SDRAM 1GBIT 制造商:Winbond Electronics Corp 功能描述:IC DDR3 SDRAM 1GBIT 78WBGA
W631GG8KB-12 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR3 SDRAM 1G-Bit 128Mx8 1.5V 制造商:Winbond Electronics Corp 功能描述:IC DDR3 SDRAM 1GBIT 制造商:Winbond Electronics Corp 功能描述:IC DDR3 SDRAM 1GBIT 78WBGA
W631GG8KB-15 制造商:Winbond Electronics Corp 功能描述:IC DDR3 SDRAM 1GBIT 制造商:Winbond Electronics Corp 功能描述:IC DDR3 SDRAM 1GBIT 78WBGA
W632 制造商:LUMINIS 制造商全称:LUMINIS 功能描述:Wall mount