参数资料
型号: W631GG6KB-12
厂商: Winbond Electronics
文件页数: 88/159页
文件大小: 0K
描述: IC DDR3 SDRAM 1GBIT 96WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR3 SDRAM
存储容量: 1G(64M x 16)
速度: 800MHz
接口: 并联
电源电压: 1.425 V ~ 1.575 V
工作温度: 0°C ~ 85°C
封装/外壳: 96-TFBGA
供应商设备封装: 96-WBGA(9x13)
包装: 托盘
W631GG6KB
8.19.4 Asynchronous ODT Mode
Asynchronous ODT mode is selected when DRAM runs in DLLon mode, but DLL is temporarily disabled (i.e. frozen) in precharge power-down (by MR0 bit
A12). Based on the power down mode definitions, this is currently Precharge power down mode if DLL is disabled during precharge power down by MR0
bit A12.
In asynchronous ODT timing mode, internal ODT command is NOT delayed by Additive Latency (AL) relative to the external ODT command.
In asynchronous ODT mode, the following timing parameters apply (see Figure 82): t AONPD, min , max, t AOFPD, min , max.
Minimum R TT turn-on time (t AONPD min) is the point in time when the device termination circuit leaves high impedance state and ODT resistance begins to
turn on. Maximum R TT turn on time (t AONPD max) is the point in time when the ODT resistance is fully on.
t AONPD min and t AONPD max are measured from ODT being sampled high.
Minimum R TT turn-off time (t AOFPD min) is the point in time when the devices termination circuit starts to turn off the ODT resistance. Maximum ODT turn
off time (t AOFPD max) is the point in time when the on-die termination has reached high impedance. t AOFPD min and t AOFPD max are measured from ODT
being sampled low.
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
CK#
CK
CKE
t IH
t IS
t IH
t IS
ODT
RTT
t AONPDmin
t AONPDmax
RTT
t AOFPDmin
t AOFPDmax
TRANSITIONING
DON'T CARE
Figure 82 – Asynchronous ODT Timings on DDR3 SDRAM with fast ODT transition: AL is ignored
In Precharge Power Down, ODT receiver remains active, however no Read or Write command can be issued, as the respective ADD/CMD receivers may
be disabled.
Table 12 – Asynchronous ODT Timing Parameters for all Speed Bins
Symbol
t AONPD
t AOFPD
Description
Asynchronous R TT turn-on delay (Power-Down with DLL frozen)
Asynchronous R TT turn-off delay (Power-Down with DLL frozen)
Min.
2
2
Max.
8.5
8.5
Unit
nS
nS
Publication Release Date: Dec. 09, 2013
Revision A05
- 88 -
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