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参数资料
| 型号： | PH28F128W18BD60A |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | 8M X 16 FLASH 1.8V PROM, 60 ns, PBGA56 |
| 封装： | 9 X 11 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-56 |
| 文件页数： | 55/106页 |
| 文件大小： | 1496K |
| 代理商： | PH28F128W18BD60A |
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Intel
Wireless Flash Memory (W18)
07-Dec-2005
Intel Wireless Flash Memory (W18)
Datasheet
52
Order Number: 290701, Revision: 015
8.4.1
System Reset and RST#
The use of RST# during system reset is important with automated program/erase devices because
the system expects to read from the flash memory when it comes out of reset. If a CPU reset occurs
without a flash memory reset, proper CPU initialization will not occur because the flash memory
may be providing status information instead of array data. To allow proper CPU/flash initialization
at system reset, connect RST# to the system CPU RESET# signal.
System designers must guard against spurious writes when VCC voltages are above VLKO.
Because both WE# and CE# must be low for a command write, driving either signal to VIH inhibits
writes to the device. The CUI architecture provides additional protection because alteration of
memory contents can only occur after successful completion of the two-step command sequences.
The device is also disabled until RST# is brought to VIH, regardless of its control input states. By
holding the device in reset (RST# connected to system PowerGood) during power-up/down,
invalid bus conditions during power-up can be masked, providing yet another level of memory
protection.
8.4.2
VCC, VPP, and RST# Transitions
The CUI latches commands issued by system software and is not altered by VPP or CE# transitions
or WSM actions. Read-array mode is its power-up default state after exit from reset mode or after
VCC transitions above VLKO (Lockout voltage). After completing program or block erase
operations (even after VPP transitions below VPPLK), the Read Array command must reset the CUI
to read-array mode if flash memory array access is desired.
8.5
Power Supply Decoupling
When the device is accessed, many internal conditions change. Circuits are enabled to charge
pumps and switch voltages. This internal activity produces transient noise. To minimize the effect
of this transient noise, device decoupling capacitors are required. Transient current magnitudes
depend on the device outputs’ capacitive and inductive loading. Two-line control and proper
decoupling capacitor selection suppresses these transient voltage peaks. Each flash device should
have a 0.1 F ceramic capacitor connected between each power (VCC, VCCQ, VPP), and ground
(VSS, VSSQ) signal. High-frequency, inherently low-inductance capacitors should be as close as
possible to package signals.
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