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参数资料
| 型号： | PH28F128W18BD60A |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | 8M X 16 FLASH 1.8V PROM, 60 ns, PBGA56 |
| 封装： | 9 X 11 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-56 |
| 文件页数： | 78/106页 |
| 文件大小： | 1496K |
| 代理商： | PH28F128W18BD60A |
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Intel
Wireless Flash Memory (W18)
Datasheet
Intel Wireless Flash Memory (W18)
07-Dec-2005
Order Number: 290701, Revision: 015
73
12.2
Block Erase
The 2-cycle block erase command sequence, consisting of Erase Setup (20h) and Erase Confirm
(D0h), initiates one block erase at the addressed block. Only one partition can be in an erase mode
at a time; other partitions must be in a read mode. The Erase Confirm command internally latches
the address of the block to be erased. Erase forces all bits within the block to 1. SR[7] is cleared
while the erase executes.
Figure 29.
Erase Suspend / Resume Flowchart
Erase
Completed
W rite FFh
Erased Partition
Read Array
Data
0
No
Read
1
Program
Loop
Read Array
Data
1
Yes
Start
Write B0h
Any Address
Read Status
Register
SR.7 =
SR.6 =
Write D0h
Any Address
Erase Resumed
Read or
Program?
Done?
Write
Standby
Write
Erase
Suspend
Read Array
or Program
Program
Resume
Data = B0h
Addr = Any address
Data = FFh or 40h
Addr = Block to program or read
Check SR.7
1 = W SM ready
0 = W SM busy
Check SR.6
1 = Erase suspended
0 = Erase completed
Data = D0h
Addr = Any address
Bus
Operation
Command
Comments
Read
Status register data. Toggle CE# or
OE# to update Status register
Addr = Same partition
Read or
Write
Read array or program data from/to
block other than the one being erased
ERASE SUSPEND / RESUME PROCEDURE
ERAS_SUS.W MF
W rite 70h
Same Partition
Write
Read
Status
Data = 70h
Addr = Same partition
Erase
Resume
Erase
Suspend
Read
Status
Read
Array
W rite 70h
Same Partition
Read
Status
If the suspended partition was placed in
Read Array mode or a Program Loop:
Write
Read
Status
Return partition to Status mode:
Data = 70h
Addr = Same partition
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